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| Patent # | Description |
|---|---|
| US-4,833,678 |
Hard-wired serial Galois field decoder An error detection and correction processor computes in real time successive approximations to a Galois field error locator polynomial and a Galois field error... |
| US-4,833,677 |
Easily testable high speed architecture for large RAMS The RAM is partitioned into modules, each of which appear as the leaf node of a binary interconnect network. This network carries the address/data/control bus... |
| US-4,833,676 |
Interleaved method and circuitry for testing for stuck open faults A method and apparatus are disclosed for testing for stuck open faults in integrated circuits (10) having a plurality of combinational logic devices (18, 20).... |
| US-4,833,675 |
PCM frame slip detection in a channel In the particular embodiment of the invention described in the specification, a frame slip detector for a detecting frame slip in a 24 channel PCM transmission... |
| US-4,833,674 |
Arrangement for processing received data in TDMA communications system
and method therefor a TDMA... In order to process data transmitted from a plurality of earth stations in a TDMA communications system with high speed, the data transmitted chronologically... |
| US-4,833,673 |
Time division multiplexer for DTDM bit streams A multiplexer for time division multiplexing a plurality of DTDM bit streams is disclosed. By taking advantage of the fact that the frames comprising each DTDM... |
| US-4,833,672 |
Multiplex system A multiplex system includes a master controller and a plurality of remote stations which are connected together by a cable. The cable is a twin co-ax cable which... |
| US-4,833,671 |
DTDM multiplexing circuitry A multiplexer for multiplexing a plurality of relatively sparsely occupied DTDM bit streams into a single more densely occupied DTDM bit stream at the same bit... |
| US-4,833,670 |
Cross-point bit-switch for communication A method and apparatus to provide high speed voice/data switching with efficient utilization of available bandwidth and minimal switching delay. More... |
| US-4,833,669 |
Circuitry for connecting multistage coupling fields and intermediate
lines Coupling circuitry for multistage coupling fields in telecommunications networks, especially time-multiplex telephone switching systems, with switching matrices... |
| US-4,833,668 |
Fault detection in a full duplex optical communications system An optical duplex system may continue to operate after a break in a fibre if light is reflected at the break and received back at the transmitting station, and... |
| US-4,833,667 |
Spindle motor assembly for low acoustic noise environments A mounting structure for a spindle motor assembly is disclosed that is capable of reducing acoustic noise generated by the motor assembly. Standard spindle motor... |
| US-4,833,666 |
Disc-record player suitable for scanning disc of different types Disc player includes a housing with a frame (11) carrying a scanning device and a disc-drive means for driving discs of different types. Loading mechanism... |
| US-4,833,665 |
Information recording control system reusing a defective area Method for controlling information recording in an information recording apparatus which includes a rewritable information record medium containing a data record... |
| US-4,833,664 |
Servo system for scanning the same track circumference of a spiral track
on a disc shaped recording medium During the storing of a tracking error signal and an index detection signal in memories in relation to rotating means for a recording medium, an error is... |
| US-4,833,663 |
Information recording/reproducing apparatus for handling defective
sectors on an optical disk Disclosed is an information recording/reproducing apparatus which uses a rewritable recording medium having a sector structure, and in which a data writing gate... |
| US-4,833,662 |
Reproduction apparatus for a magneto-optical recording medium A reproduction apparatus for an optical magnetic disk having data recorded in a magneto-optical recording form and an address recorded in an optical recording... |
| US-4,833,661 |
Timepiece with random-numbered dial A watch has a dial with numerals 1 through 12 circumferentially distributed thereon in a random sequence. The current time is indicated by the watch hands... |
| US-4,833,660 |
Device for detecting the presence of frost and/or for measuring the
thickness of frost by ultrasound and frost... In a detection device of the presence of frost and/or measuring the thickness of the frost by ultrasound, a probe with a piezoelectric ultrasonic transducer... |
| US-4,833,659 |
Sonar apparatus A hydrophone array wherein each individual hydrophone of the array is comprised of, e.g. polyvinylidine fluoride (PVF.sub.2), tiles bonded to a substrate member... |
| US-4,833,658 |
Method of seismic prospecting with very high resolution in horizontal
boreholes A method of seismic prospecting with very high resolution as applicable in particular to exploitation of a productive hydrocarbon deposit essentially consists in... |
| US-4,833,657 |
Semiconductor frame buffer memory A semiconductor memory for writing or reading data words in response to prescribed bank address data and bit address data, each word having a prescribed amount... |
| US-4,833,656 |
Fast access circuit for dynamic type semiconductor memory device A semiconductor memory device comprises a row address buffer (5') which operates in response to an external address signal (A.sub.0 .about.A.sub.7) for... |
| US-4,833,655 |
FIFO memory with decreased fall-through delay A first-in, first out data memory minimizes fall-through delay. The FIFO memory has a plurality of cascaded register stages arranged in sections, with the input... |
| US-4,833,654 |
Method of and circuitry for generating staggered restore timing signals
in block partitioned DRAM A memory cell array is divided into four blocks. A sense amplifier and a restore circuit and provided in each of the blocks. The sense amplifier operates by a... |
| US-4,833,653 |
Dynamic random access memory having selectively activated subarrays A DRAM of a partially activating system, in which, in an active cycle, sense amplifiers (91a, 91b) are inactivated and the potential on each pair of bit lines... |
| US-4,833,652 |
Semiconductor memory device having a self-diagnosing function A defect detection circuit for detecting a defect of a memory cell, a counter for counting defects detected by the defect detect circuit, and a remediableness... |
| US-4,833,651 |
High-speed, asynchronous, No-Fall-Through, first-in-first out memory
with high data integrity A No-Fall-Through, FIFO memory includes a memory section comprising a plurality of locations for storing data words. Data words are written into the storage... |
| US-4,833,650 |
Semiconductor memory device including programmable mode selection
circuitry A semiconductor memory device includes a plurality of operation mode control circuits provided on a memory chip of the device for respectively executing a... |
| US-4,833,649 |
Multiple port random access memory A multiple port memory includes a set of memory units each comprising a set of memory cells, one corresponding to each port. Each cell of a memory unit stores a... |
| US-4,833,648 |
Multiport ram hybrid memory cell with fast write A fast write CMOS memory cell includes two CMOS inverters connected in a latched configuration with the first CMOS inverter having a P-channel transistor (98)... |
| US-4,833,647 |
Semiconductor memory device having high capacitance and improved
radiation immunity The semiconductor memory device of the present invention is formed on an integrated substrate and is immune to alpha radiation. The device includes a... |
| US-4,833,646 |
Programmable logic device with limited sense currents and noise reduction A programmable logic device is disclosed which is adapted to isolate the Miller capacitances of erased memory cells from the product terms and to limit the cell... |
| US-4,833,645 |
Semiconductor memory device having improved resistance to alpha particle
induced soft errors In the semiconductor memory device according to the present invention, a n type drain diffused region (9a) to be connected to a bit line (12) is formed on a p... |
| US-4,833,644 |
Memory cell circuit having radiation hardness A memory cell circuit has a pair of inverters and a means, such as gate-drain coupled capacitors, for providing a greater voltage difference at MOS transistor... |
| US-4,833,643 |
Associative memory cells Associative memory cell with low power consumption and capable of performing a high speed operation in which MOS transistors of a first conductive type... |
| US-4,833,642 |
Cache controller giving versatility to cache memory structure An associative type cache controller includes a plurality of directory banks each holding an address tag of a cache block, each of the directory banks having a... |
| US-4,833,641 |
System for numerical description of computer program logic Data processing for an improved description of the logical structure of a large computer programs supervises, implements and coordinates a collection of... |
| US-4,833,640 |
Register bank change including register to register transfer in a data
processing system The data processing system has a data processing function to perform a data processing by specifying one of a plurality of register groups according to an... |
| US-4,833,639 |
High-speed analog multiplier--absolute value detector A high-speed analog multiplier circuit for multiplying two analog inputs comprises a signum generator having an X input multiplier and having an output connected... |
| US-4,833,638 |
Parallel processing state alignment Circuitry, and associated methodology, in a parallel processing environment for aligning the various processing states of the autonomous processors communicating... |
| US-4,833,637 |
Acousto-optic multi-channel space integrating correlator Acousto-optic multi-channel space integrating correlators and methods of using the same are disclosed. The correlators consist of a single channel acousto-optic... |
| US-4,833,636 |
Analog, two signal correlator A correlator, such as may be used in a phase detecting device of an automatic focusing circuit for a camera , has a simple arrangement that attains improved... |
| US-4,833,635 |
Bit-slice digital processor for correlation and convolution A bit-slice digital processor for performing an N-point correlation or convolution of N single-bit coefficients with a bit parallel, word serial, bit-staggered... |
| US-4,833,634 |
Multipurpose adaptive filter This rate dependent filter has a two-portion continuous filter function which optimizes noise filtering and minimizes detrimental lag or degradation... |
| US-4,833,633 |
Opto-electronic random number generating system and computing systems
based thereon Images having specified illumination intensity distributions are used at low light levels to produce photoevents which are electronically detected to generate... |
| US-4,833,632 |
Electronic record keeping device An electronic record keeping device for recording numerical data under different items. The device has a casing and a memory having a plurality of sections. The... |
| US-4,833,631 |
System for parameter identification of analog signals A system for determining the s-plane parameters, s.sub.i and r.sub.i, of the transient response, ##EQU1## of a network-under-test (NUT). A filter bank,... |
| US-4,833,630 |
Method and apparatus for the tridimensional measuring of an object A method and apparatus provides a three dimensional measurement of a point on an object. A surface with a system for detecting the position of sensors is placed... |
| US-4,833,629 |
Apparatus for categorizing and accumulating events Apparatus for categorizing and accumulating a plurality of different event types wherein the characteristics of each event are detected by a detector and... |
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