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| Patent # | Description |
|---|---|
| US-5,327,029 |
Logarithmic current measurement circuit with improved accuracy and
temperature stability and associated method A logarithmic current measurement circuit for operating upon an input electric signal utilizes a quad, dielectrically isolated, well-matched, monolithic bipolar... |
| US-5,327,028 |
Voltage reference circuit with breakpoint compensation A voltage reference circuit includes a band-gap reference circuit for providing a reference voltage and having breakpoint compensation to adjust the temperature... |
| US-5,327,027 |
Circuit for multiplying the value of a capacitor A circuit is described herein which effectively multiplies the value of a capacitor. The circuit draws current from an input node, where this current being drawn... |
| US-5,327,026 |
Self-timed bootstrap decoder A row decoder that includes circuitry to provide a self-timed bootstrap signal. The self-timed bootstrap signal is generated in response to the selection of the... |
| US-5,327,024 |
Field programmable antifuse device and programming method therefor A method for reducing the resistance of a programming path through a programmable antifuse from a programming voltage to ground. A previously programmed helper... |
| US-5,327,023 |
Programmable logic device A programmable logic device of the present invention is constructed to reduce the number of switching elements in wire switches when programmably connecting... |
| US-5,327,022 |
Multiplexer circuit less liable to malfunction A multiplexer circuit comprises a plurality of circuits for decoding digital timing signals, and a plurality of circuits for passing an one of the analogue... |
| US-5,327,021 |
Waveform synthesizing circuit A waveform synthesizing circuit comprises a plurality of signal output switching means for outputting predetermined magnitudes of voltage or current signals when... |
| US-5,327,020 |
Schmitt trigger input buffer circuit A Schmitt trigger input buffer circuit includes two inverting gates with different threshold voltages, which receive an input signal, a dual-input-AND pair and... |
| US-5,327,019 |
Double edge single data flip-flop circuitry A method and system that include double-clock and double-edge flip-flops that produce a circuit output signal in response to two clock signals that have a first... |
| US-5,327,018 |
Interface circuit for chip cards The invention concerns interface circuits for chip card readers. It consists of providing link connections between this circuit and the reader, these connections... |
| US-5,327,017 |
Circuit arrangement for switching of RF signals A circuit arrangement for switching-through (transit switching) of RF-signals is provided. The signals from several RF-signal sources are switched via controlled... |
| US-5,327,016 |
Load control circuit including automatic AC/DC discernment A control circuit for switching AC or DC loads and for automatically discerning the presence of an AC or a DC power supply via a switch has been provided. The... |
| US-5,327,015 |
Superconductor device to produce electrical impulses An apparatus for producing an electrical impulse comprising a tube made of superconducting material; a source of magnetic flux is mounted about one end of the... |
| US-5,327,014 |
Firing control device for triggering a passenger restraint system of a
vehicle A firing control device (G) for triggering a passenger restraint system of a vehicle by electrically firing one or more firing pellets (Z1, Z2), having a... |
| US-5,327,013 |
Solder bumping of integrated circuit die A method for forming a solder bump on an integrated circuit die utilizes a terminal (12) formed of an electrically conductive, solder-wettable composite material... |
| US-5,327,012 |
Semiconductor device having a double-layer interconnection structure A semiconductor device having a double-layer interconnection with contact portions between first and second metal films, each having a multi-layered structure,... |
| US-5,327,011 |
Semiconductor device with enhanced via or contact hole connection
between an interconnect layer and a... A semiconductor device has an interconnect layer, connected to a connecting region, such as a diffusion region or layer formed on the surface of a substrate,... |
| US-5,327,010 |
IC card having adhesion-preventing sheets An IC card includes a substrate, semiconductor devices mounted on at least one of the major surfaces of the substrate and a casing in which the substrate with... |
| US-5,327,009 |
Miniaturized integrated circuit package A high density integrated circuit package is provided whose miniaturization is performed by positioning inner end portions of lead fingers extending externally... |
| US-5,327,008 |
Semiconductor device having universal low-stress die support and method
for making the same A semiconductor device (10) includes a lead frame (12) having tie bars (16). In one form of the invention, the tie bars are used to support a semiconductor die... |
| US-5,327,007 |
Semiconductor substrate having a gettering layer A silicon wafer having a low concentration of oxygen and a silicon wafer having a high concentration of oxygen are joined and polished to prescribed thicknesses... |
| US-5,327,006 |
Thin, dielectrically isolated island resident transistor structure
having low collector resistance The occupation area and thickness of dielectrically isolated island-resident transistor structures, which employ a buried subcollector for providing low... |
| US-5,327,005 |
Striped contact IR detector An IR detector array (10) wherein a metal contact pad (20) makes contact to an underlying radiation detector through one or more thin, electrically conductive... |
| US-5,327,004 |
Solid-state imaging device with an electrically connected light shield
layer A solid-state imaging device. A hole accumulation layer is provided on the surface of a photosensor region. Voltage lower than the voltage of the hole... |
| US-5,327,003 |
Semiconductor static RAM having thin film transistor gate connection A semiconductor memory device includes a semiconductor substrate, a memory cell provided on the semiconductor substrate and including first and second transfer... |
| US-5,327,002 |
SRAM with gate oxide films of varied thickness A semiconductor memory device of the SRAM type includes a memory cell including a pair of inverters each having a resistor and a driving transistor connected in... |
| US-5,327,001 |
Thin film transistor array having single light shield layer over
transistors and gate and drain lines A TFT array has a plurality of gate lines and a plurality of drain lines formed on a transparent insulating substrate. The gate lines intersect with the drain... |
| US-5,327,000 |
Semiconductor device interconnected to analog IC driven by high voltage In a MOS type LSI comprising an n channel-open-drain-transistor capable of connecting with an analog IC driven by a high voltage, a surge breakdown voltage and a... |
| US-5,326,999 |
Non-volatile semiconductor memory device and manufacturing method thereof Disclosed is a non-volatile semiconductor memory device and the manufacturing method thereof. The non-volatile semiconductor memory device comprising a... |
| US-5,326,998 |
Semiconductor memory cell and manufacturing method thereof A semiconductor memory cell and device having a tubular formed storage electrode of a capacitor through which a bit line passes. The source, gate and drain of a... |
| US-5,326,997 |
Linear image sensor with shutter gates for draining excess charge In a linear sensor, a charge transfer part is disposed between a one-dimensional array of photodetectors and an overflow drain and includes a CCD having four or... |
| US-5,326,996 |
Charge skimming and variable integration time in focal plane arrays Methods and apparatus for implementing charge skimming and variable integration time in focal plane arrays formed in a silicon substrate. The present invention... |
| US-5,326,995 |
Semiconductor device having a heterojunction interface for transporting
carriers with improved carrier mobility A heterojunction semiconductor device comprises a semi-insulating substrate, a channel layer comprising first and second sub-layers provided on the substrate for... |
| US-5,326,994 |
Protective circuit for protecting contacts of monolithic integrated
circuits by preventing parasitic latch up... A protective circuit for connecting contacts of monolithic integrated circuits, particularly CMOS input/output stages. The protective circuit has a four-layer... |
| US-5,326,993 |
Insulated gate bipolar transistor An insulated gate bipolar transistor employs a semiconductor substrate constructed by putting a high impurity density area, a low impurity density and a... |
| US-5,326,992 |
Silicon carbide and SiCAlN heterojunction bipolar transistor structures A heterojunction bipolar transistor (HBT) structure is configured so that the heterojunction between hexagonal and cubic materials is electrically active. A... |
| US-5,326,991 |
Semiconductor device having silicon carbide grown layer on insulating
layer and MOS device A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer... |
| US-5,326,990 |
Composite lead frame with connected inner and outer leads An outer lead of a metal lead frame is connected to an inner lead of a flexible lead-patterned substrate via a Au-Sn alloy layer. The Au-Sn alloy layer contains... |
| US-5,326,989 |
Semiconductor device having thin film transistor and method of
manufacturing the same A thin film transistor is used as a load transistor in a memory cell in a SRAM. A load thin film transistor is arranged on an interlayer insulating layer on the... |
| US-5,326,988 |
Superconducting switching device and method of manufacturing same A superconducting device including first and second trenches formed on a principal surface of a semiconductor substrate, separated from each other, and first and... |
| US-5,326,986 |
Parallel N-junction superconducting interferometer with enhanced
flux-to-voltage transfer function A physical configuration for a parallel multi-junction superconducting quantum interference device that can be used for a variety of applications involving the... |
| US-5,326,985 |
Bipolar doped semiconductor structure and method for making A semiconductor structure that provides both N-type and P-type doping from a single dopant source is provided. A first doping region (13) comprising a first... |
| US-5,326,984 |
Electromagnetic wave detector An electromagnetic wave detector comprises a stack of quantum wells included between an ohmic contact and a rectifier junction which may be a barrier (Al.sub.y... |
| US-5,326,983 |
Storage phosphor cassette autoloader having cassette sensor An autoloader for positioning cassettes relative to a storage phosphor reader (i.e. stimulable phosphor). A capacitive sensor located at one or more cassette... |
| US-5,326,982 |
Analogue displacement sensor The invention relates to an analogue sensor for sensing deviation from a normal position in at least two directions. The sensor senses dimensions in at least one... |
| US-5,326,981 |
Electron beam excited ion irradiation apparatus In an electron beam excited ion irradiation apparatus which irradiates ions to a material, an electrical discharge changes an inert gas into a plasma. Electrons... |
| US-5,326,980 |
Ion implanter with plural surface potential sensors An ion implanter including an ion beam generator for irradiating an ion beam toward a rotary drum having a front surface with a number of substrates fixed and... |
| US-5,326,979 |
Electron beam lithography system An electron beam lithography system which generates phase shift pattern data relating to main patterns, and exposes the phase shift pattern on a mask plate by... |
| US-5,326,978 |
Focused electron-bombarded detector A focused electron-bombarded (FEB) ion detector comprising an MCP, focusing means, and a collection anode disposed in a detector body. The collection anode... |
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