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Patent #	Description
US-5,432,139	Catalyst formulation and polymerization process Processes for the formulation of Ziegler-type catalysts from a transition metal component, an electron donor and a co-catalyst which are sequentially mixed...
US-5,432,138	Process for manufacturing a lithium aluminate matrix layer for a molten carbonate fuel cell A gamma lithium aluminate matrix layer for a molten carbonate fuel cell is manufactured using a slurry whose liquid phase is formed by an aqueous polyvinyl...
US-5,432,137	Process for producing a highly crystalline, fine .alpha.-alumina powder A novel process for producing highly crystalline, fine .alpha.-alumina is disclosed. Aluminum hydroxide is calcined in the presence of fine silica powder. The...
US-5,432,136	Dielectric ceramic compositions The present invention is directed to a dielectric ceramic composition composed of, 97.5 to 99.95 wt. % of main component represented by, {100-(a+b+c+d)}...
US-5,432,135	Dielectric ceramic composition for high frequency A dielectric ceramic composition for high frequency-use comprising a composition (A) containing at least Ba, Mg and W as metal elements represented by a...
US-5,432,134	Microwave dielectric ceramic composition A low loss dielectric ceramic composition is disclosed, which is usable in a microwave filter and global positioning that is superior in quality coefficient (Q)...
US-5,432,133	Production process of a sintered high-toughness alumina-based composite body A sintered high-toughness alumina-based composite body comprises a plate- or rod-like, corundum or alumina-based compound structure and another structure having...
US-5,432,132	Silicon nitride based cutting tool insert A silicon nitride based composition for manufacturing sintered ceramic articles, in particular cutting tool inserts, having improved density, hardness and...
US-5,432,131	Lead-containing fluoride glass, optical fiber and process for producing it Lead-containing fluoride glass comprises 50-70 mol % of ZrF.sub.4, 3-5 mol % of LaF.sub.3, 0.1-3 mol % of YF.sub.3, and 2-15 mol % of NaF and/or LiF and/or CsF,...
US-5,432,130	Opalescent glass An opalescent glass is described which is characterized by a continuous glass phase and a discontinuous glass phase dispersed therein, and which can be used as...
US-5,432,129	Method of forming low resistance contacts at the junction between regions having different conductivity types A thin film transistor structure having a first and a second polycrystalline silicon layer of different conductivity types (P and N) has a high resistance...
US-5,432,128	Reliability enhancement of aluminum interconnects by reacting aluminum leads with a strengthening gas This invention encompasses using a strengthened shell to enhance reliability of aluminum leads of a semiconductor device. The invention includes depositing an...
US-5,432,127	Method for making a balanced capacitance lead frame for integrated circuits having a power bus and dummy leads A method for electrically connecting a lead frame (10) to an integrated circuit (40). Each lead conductor (16) and (18) of the lead frame (10) has the identical...
US-5,432,126	Fabrication process of compound semiconductor device comprising L-shaped gate electrode After forming a silicon oxide layer and an amorphous silicon layer on a GaAs substrate in stacking manner, a gate electrode forming opening portion is formed by...
US-5,432,125	Method of manufacturing semiconductor device In a method of manufacturing a semiconductor apparatus, a resist is coated on a semiconductor substrate and baked. The resist is exposed with an electron beam,...
US-5,432,124	Method of manufacturing compound semiconductor There is provide a method of manufacturing a compound semiconductor (MBE) that can make the substrate surface of the semiconductor highly clean and plane so that...
US-5,432,123	Method for preparation of monolithically integrated devices A monolithically integrated electroabsorption modulator/optical amplifier is described which is prepared using a lateral bandgap control technique with a planar...
US-5,432,122	Method of making a thin film transistor by overlapping annealing using lasers The present invention provides a method of making a thin film transistor for driving a liquid crystal display comprising the steps of forming a gate electrode on...
US-5,432,121	Method for fabricating a multilayer epitaxial structure An all epitaxial process performed entirely in a CVD reactor is employed to grow epitaxial layers with accurately controlled successively low and high dopant...
US-5,432,120	Method for producing a laterally limited single-crystal region with selective epitaxy and the employment... For producing a laterally limited, single-crystal region on a substrate, for example the collector of a bipolar transistor or the active region of a MOS...
US-5,432,119	High yield electron-beam gate fabrication method for sub-micron gate FETS Yields of FETs such as HEMTs are significantly improved by establishing an elongate gate contact opening in a patterning material with the patterning material...
US-5,432,118	Process for forming field isolation Field isolation regions are formed using oxidation-resistant spacers or plugs that completely fill trenches within a semiconductor substrate prior to forming the...
US-5,432,117	Method of producing semiconductor device An insulating film and a silicon nitride film are formed on a semiconductor substrate. A resist film is patterned on the silicon nitride film. Thereafter, using...
US-5,432,116	Method for the fabrication of dynamic random access memory capacitor A method for fabricating a dynamic random access memory capacitor. It is characterized by forming multi-insulating films with different etch selection ratio...
US-5,432,115	Process for making a contact betwen a capacitor electrode disposed in a trench and an MOS transistor... To make a contact between a capacitor electrode (13) disposed in a trench (11) and an MOS transistor source/drain region disposed outside the trench, a shallow...
US-5,432,114	Process for integration of gate dielectric layers having different parameters in an IGFET integrated circuit A process for fabricating an IGFET integrated circuit having two gate dielectric layers with different parameters is provided. Typically, the process is used for...
US-5,432,113	Method of making a semiconductor memory device A method of manufacturing a semiconductor memory device including at least one memory cell having a transistor and a capacitor, forming at least one trench in a...
US-5,432,112	Process for EPROM, flash memory with high coupling ratio A semiconductor device is formed on a substrate lightly doped with a dopant, a source region and a drain region in the substrate on the surface thereof, a...
US-5,432,110	Method for fabricating non-volatile semiconductor memory device having two-layered gate structure transistor A method is for fabricating a non-volatile semiconductor memory device with a two-layered gate electrode structure having a control gate electrode and a floating...
US-5,432,109	Device method for manufacturing a semiconductor memory A method for manufacturing a floating gate field effect transistor includes the steps of forming a plurality of first band-like insulating films over a...
US-5,432,108	Method for fabricating a thin film transistor A method for fabricating a thin film transistor which includes steps for, forming a first and a second gate electrode on a transparent insulation substrate,...
US-5,432,107	Semiconductor fabricating method forming channel stopper with diagonally implanted ions A silicon dioxide film and a silicon nitride film are sequentially deposited on an n-type silicon substrate in this order. After the silicon nitride film is...
US-5,432,106	Manufacture of an asymmetric non-volatile memory cell An EPROM memory cell and its fabrication are described. The semiconductor substrate is a first conductivity type. The process begins by forming a conductive gate...
US-5,432,105	Method for fabricating self-aligned polysilicon contacts on FET source/drain areas Improved N-channel and P-channel field effect transistor device structure having self-aligned polysilicon pads contacts and a process for making such devices has...
US-5,432,104	Method for fabricating a vertical bipolar transistor with reduced parasitic capacitance between base and... A method of fabricating a vertical bipolar semiconductor device includes a step of forming an N.sup.- -type silicon epitaxial layer which constitutes a part of a...
US-5,432,103	Method of making semiconductor ROM cell programmed using source mask ROM cell programmed ON has N+ source implant spaced a given distance from the gate with LDD bridging the gap between the N+ source and the N channel. ROM cell...
US-5,432,102	Method of making thin film transistor with channel and drain adjacent sidewall of gate electrode A thin film transistor and a method which forms a channel region (c), a lightly doped drain region (LDD) region and, optionally, an offset region (o), in a...
US-5,432,101	Macropolycyclic rare earth complexes and application as fluorescent tracers The invention relates to macropolycyclic rare earth complexes, namely cryptates which are useful as fluorescent tracers.
US-5,432,100	Diagnostic system employing a unitary substrate to immobilize microspheres In a diagnostic apparatus system, a one piece porous substrate is provided in a container. The substrate serves both to extract an antigen in or on a top layer...
US-5,432,099	Determination of ambient concentation of several analytes A method for determining the ambient concentrations of a plurality of analytes in a liquid sample of volume V liters, comprises loading a plurality of different...
US-5,432,098	Apparatus, and process, for automatically sampling solids and semi-solids materials for analysis Apparatus, and process, for extracting organic fluids and solids specimens from weighed amounts of semi-solids and solids samples for collection, concentration...
US-5,432,097	Method for recovery of blood cells from dried blood spots on filter paper White blood cells (WBC) were recovered from dried blood spots on Guthrie cards by a simple and efficient prototypic method. The mummified formed elements of...
US-5,432,096	Simultaneous multiple, single wavelength electromagnetic wave energy absorbtion detection and quantifying... Spectrophotometric sample analysis systems, and methods of their use, capable of "simultaneously" detecting, quantifying, displaying and/or recording energy...
US-5,432,095	Partial permixing in flame-ionization detection A method of detecting a concentration of contaminants in an air sample. The method includes the steps of combining a first portion of the air sample with a fuel...
US-5,432,094	Apparatus and method for collecting, detecting and indicating true alveolar breath collections A simplified, user-friendly method and apparatus for collecting and storing a human breath sample and for detecting and indicating whether the stored breath...
US-5,432,093	Sequential degradation of proteins and peptides from the N-terminus A novel method for the sequential degradation from the N-terminus of small samples of proteins or peptides. The released amino acids may be detected by mass...
US-5,432,092	C-terminal peptide sequencing using diphenyl phosphoroisothiocyanatidate and pyridine A carboxy terminal protein sequencing process is disclosed which utilizes phosphoroisothiocyanatidate for the derivatization step.
US-5,432,091	N-terminal sequencing of proteins and peptides An improved method for the N-terminal sequential degradation of proteins and peptides is disclosed. The protein or peptide to be sequenced is reacted with a...
US-5,432,090	Method for measuring metal ingredients in combustion gas The invention is to continuously measure the contents of trace ingredients such as alkaline metal contained in combustion gas with high precision. An oxidizer...
US-5,432,089	Reference control for use with manual and flow cytometric reticulocyte counting devices A stable reticulocyte reference control which may be used with both manual and flow cytometric reticulocyte counting devices is provided. The reference control...

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