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| Patent # | Description |
|---|---|
| US-5,432,747 |
Self-timing clock generator for precharged synchronous SRAM A self-timing clock generator for use with a precharged Static Random Access Memory (SRAM). The invention asynchronously switches the memory clock pulse to a... |
| US-5,432,746 |
EEPROM memory organized in plural bit words The invention relates to integrated circuit memories and more particularly to non-volatile memories of the EEPROM type. The memory is organized in p-bit words... |
| US-5,432,745 |
Method for testing a memory device A method for testing a memory device including (M.times.N) bit lines having memory cells connected thereto, the (M.times.N) bit lines being divided into N bit... |
| US-5,432,744 |
Dynamic semiconductor memory circuit A dynamic semiconductor memory circuit, having simultaneous select means composed of inverters and logic gates is provided. The simultaneous select means... |
| US-5,432,743 |
Semiconductor dynamic RAM for image processing A semiconductor dynamic RAM for image processing, according to the present invention, comprises a VRAM having logical operation function of performing a... |
| US-5,432,742 |
System memory and a microcomputer comprising the same A system memory which includes a plurality of memory cells capable of functioning as ROMS or RAMs and being arranged in an arbitrary minimum unit. The read only... |
| US-5,432,741 |
Circuit for permanently disabling EEPROM programming A circuit for programming an EEPROM 42 which is used to provide trim adjustment for an integrated circuit (IC). The programming circuit provides the capability... |
| US-5,432,740 |
Low voltage flash EEPROM memory cell with merge select transistor and
non-stacked gate structure A EEPROM memory array (10) includes a plurality of memory cells (24) which are connected in a symmetric array between row lines (26) and Column Lines (28) and... |
| US-5,432,739 |
Non-volatile sidewall memory cell method of fabricating same A non-volatile memory cell and array of such cells is provided. The memory cell includes a single transistor floating gate cell fabricated on a sidewall of a... |
| US-5,432,738 |
Nonvolatile semiconductor storage system An object is to realize a nonvolatile semiconductor storage system which can prevent a false reading operation due to the overerasure, improve the lower limit of... |
| US-5,432,737 |
Semiconductor memory In a semiconductor memory comprising first bit lines, second bit lines and first nonvolatile split gate memory cells and second nonvolatile split gate memory... |
| US-5,432,736 |
BiCMOS memory cell with current access A current mode access BiCMOS memory cell is disclosed. The memory cell includes a CMOS storage cell for storing first and second CMOS voltage potentials, VDD and... |
| US-5,432,735 |
Ternary storage dynamic RAM A memory apparatus using conventional DRAMs which uses a ternary representation of stored data. Each DRAM memory cell can thus store three states. The ternary... |
| US-5,432,734 |
Magnetoresistive element and devices utilizing the same A MR element which has a basically three-layered structure wherein the first and the second magnetic layer sandwich the nonmagnetic layer or of a basically... |
| US-5,432,733 |
Semiconductor memory device A semiconductor memory device includes a memory cell array having a plurality of dynamic memory cells each of which has a plurality of cascade-connected MOS... |
| US-5,432,732 |
Dynamic semiconductor memory A DRAM memory cell which can be easily manufactured, and has a high breakdown voltage, and a large capacitance. The dynamic semiconductor memory has capacitors... |
| US-5,432,731 |
Ferroelectric memory cell and method of sensing and writing the
polarization state thereof A memory cell containing a ferroelectric capacitor the memory state of which is sensed by cycling the potential across the capacitor from zero, through an upper... |
| US-5,432,730 |
Electrically programmable read only memory array There is provided an EPROM array including columns of EPROM cells, three types of diffusion bit lines, two types of metal lines and two types of select... |
| US-5,432,729 |
Electronic module comprising a stack of IC chips each interacting with
an IC chip secured to the stack An electronic module comprising a multiplicity of prestacked IC chips, such as memory chips, and an IC chip, referred to as an active substrate or active... |
| US-5,432,728 |
Process for performing numerical computations, and arithmetic unit for
implementing this process An arithmetic unit includes a 33-bit operator. The bit of rank 16 serves to select either a first working mode in which the operator performs a computation on... |
| US-5,432,727 |
Apparatus for computing a sticky bit for a floating point arithmetic unit An arithmetic unit wherein a plurality of electrical signals corresponding to the mantissa is shifted and a bit signal corresponding to the sticky bit is... |
| US-5,432,726 |
Arithmetic unit for quantization/inverse quantigation Two sets of input data A and B are provided. A first selector circuit outputs either the most significant bit of the input data B or the inversion thereof, in... |
| US-5,432,725 |
Self-adapting filter The Self-Adapting Filter is an adaptive interference suppression device t can be used to extract bandspread communication signals from a received signal... |
| US-5,432,724 |
Processor for uniform operations on respective series of successive data
in respective parallel data streams A data processing system for processing parallel first and second sequences of successive first and successive second data, respectively, includes a memory,... |
| US-5,432,723 |
Parallel infinite impulse response (IIR) filter with low quantization
effects and method therefor A parallel IIR filter (100) has low quantization effects and includes a multiplier (103) which multiplies a digital input signal by a constant, and an arbitrary... |
| US-5,432,722 |
Global interconnect architecture for electronic computing modules An architecture for an optical computing apparatus which utilizes global free space smart optical interconnects and is based on a digital logic family derived... |
| US-5,432,721 |
Device and method of displaying mathematical expression for small
electronic appliance When a user requested mathematical expression requiring, when normally displayed, a plurality of display rows is not an independent numerical element in another... |
| US-5,432,720 |
Rotatable pen-based computer A pen-based computer includes a housing and a flat panel display integral therewith. The computer housing has a slanted parallelpiped configuration with... |
| US-5,432,719 |
Distributed memory architecture for a configurable logic array and
method for using distribution memory This invention provides additional circuitry for a configurable logic array having logic functions which are programmed by loading memory cells which cause the... |
| US-5,432,718 |
Particle interaction processing system Fluid flow is simulated by a massively parallel data processor having combinational logic for processing collision rules at lattice sites. Following collision... |
| US-5,432,716 |
Method and apparatus for filtering signals A method and apparatus for filtering signals wherein a signal input to which the input signal is connected connects through a delay unit to a signal output and... |
| US-5,432,715 |
Computer system and monitoring method A computer system and monitoring method for efficiently monitoring a plurality of computers interconnected within a network. In this computer network system,... |
| US-5,432,714 |
System and method for preparing shape data for proximity correction In electron beam lithography, an apparatus and method decompose rectangles at the exterior of a desired electron beam exposure pattern into portions having a... |
| US-5,432,713 |
Usage parameter control circuit for effecting policing control in an ATM
network A usage parameter control circuit for effecting a policing control in an ATM transmission network, comprising a time interval measuring unit for measuring a time... |
| US-5,432,712 |
Machine vision stereo matching Corresponding points in at least two different images of a scene are matched by the use of a shortest path analysis. An edge point in a continuous edge segment... |
| US-5,432,711 |
Interface for use with a process instrumentation system The present invention relates to an interface for a maintenance system used in conjunction with a process instrumentation system. More specifically, the... |
| US-5,432,710 |
Energy supply system for optimizing energy cost, energy consumption and
emission of pollutants An energy supply system for supplying, in system interconnection, power received at a power receiving equipment from a power plant and power generated by a fuel... |
| US-5,432,709 |
Computer control system for portable self-contained ground water testing
assembly A portable ground water sampling apparatus has a submersible pump or other water sampling apparatus attached through a hose to a hydraulically driven spool... |
| US-5,432,708 |
Multichip module integrated circuit device having maximum input/output
capability A high I/O count integrated circuit is disposed on a semiconductor chip having opposing faces and comprises a plurality of functional circuit modules, each... |
| US-5,432,707 |
Automated circuit design A method for designing a digital circuit using a multiplicity of cells is disclosed. Each of the cells comprises a plurality of digital components. The goal of... |
| US-5,432,706 |
Multimeter having min/max time stamp A min/max time stamp for a multimeter provides display of minimum and maximum measured values recorded since enabling a min/max function. The minimum and maximum... |
| US-5,432,705 |
Administrative computer and testing apparatus An administrative computer and testing apparatus device is provided. The administrative computer is coupled to the testing apparatus so that the test data can be... |
| US-5,432,704 |
Adaptive lamina generation for shape dependent process control and/or
object decomposition A method of automatically operating a machine with respect to an object having a desired profile, wherein the machine's operation is controlled based on a model... |
| US-5,432,703 |
Laser digitizer system for producing orthotic and prosthetic devices A system and method for producing a device, such as a prosthetic or orthodontic structure, is provided, having an inner surface for engagement with a portion of... |
| US-5,432,702 |
Bar code recipe selection system using workstation controllers A barcode processing system for a semiconductor wafer, comprising a workstation controller, a bar code reader attached to the workstation controller for reading... |
| US-5,432,701 |
Electronic system in a motor vehicle for detecting a rough road condition A system and method for generating a signal which indicates whether a motor vehicle containing such a system is operating on a rough road surface. The generated... |
| US-5,432,700 |
Adaptive active vehicle suspension system An adaptive active suspension system for a wheeled vehicle in which a powered actuator supplies a force between an unsprung wheel assembly and the vehicle body.... |
| US-5,432,699 |
Motion compensation apparatus and method of gyroscopic instruments for
determining heading of a borehole A method and apparatus is disclosed for measuring motion signals of gyroscopes in downhole instruments used to determine the heading of a borehole. An... |
| US-5,432,698 |
Data input and output controller for anesthesia monitoring system Apparatus provides an interface between a computer, various data sources such as patient monitors and a printer via the parallel printer port of a computer for... |
| US-5,432,697 |
Technique for controlling the symbolic dynamics of chaotic systems to
generate digital communications waveforms A method and apparatus for encoding information on a chaotic system by causing tiny perturbations in an accessible system control variable, or trajectory, uses... |
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