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| Patent # | Description |
|---|---|
| US-5,467,327 |
Method of masking data on a storage medium A method of masking data on a storage medium for selective playback upon demand or for transcription to another medium. The method comprising the steps of (a)... |
| US-5,467,326 |
Apparatus for selectively playing a recording medium A recording medium playing apparatus which is capable of shortening the time required for operating the installation of recording media, and also, of... |
| US-5,467,325 |
Watch case A watch case (M) including a caseband (1) and a back cover (4) which can be engaged with and clamped in the caseband by imparting a rotational movement to the... |
| US-5,467,324 |
Wristwatch radiotelephone with deployable voice port A wristwatch radiotelephone is usable as a radiotelephone without the need to remove the apparatus from the user's wrist and without the need to plug any... |
| US-5,467,323 |
Electroacoustic transducer In an electroacoustic transducer, the opening portion of a casing body which contains therein a magnetic driving portion for converting an electric signal into a... |
| US-5,467,322 |
Water hammer driven vibrator The invention provides apparatus for shaking structures such as fins in a fluid agitator, shaking tables, shaking screens, conveyors, or the walls of bins or... |
| US-5,467,321 |
Insertion ultrasonic transducer with mode conversion and method for
reducing multiple signal reception An insertion type ultrasonic transducer assembly adapted to be mounted to a pipe for determining ultrasonic energy transit time through fluid in the pipe. The... |
| US-5,467,320 |
Acoustic measuring method for borehole formation testing An acoustic formation apparatus is set forth. It utilizes the drill bit on a drill stem as the acoustic source. At a common azimuth and spaced vertically along... |
| US-5,467,319 |
CAM array and method of laying out the same A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table.... |
| US-5,467,318 |
Address generating and decoding apparatus with high operation speed In an apparatus for adding first and second addresses to generate a third address and decoding the third address to generate a plurality of partial decoding... |
| US-5,467,317 |
Semiconductor memory device for use an apparatus requiring high-speed
access to memory cells A semiconductor memory device including a plurality of cell array sections each having a plurality of memory cells disposed in a matrix form, the plurality of... |
| US-5,467,316 |
Device and method of reducing word line resistance of a semiconductor
memory A semiconductor memory device with a memory array of cells formed as a matrix has bit lines, and word lines driven by word line drivers, where each of the word... |
| US-5,467,315 |
Semiconductor memory device facilitated with plural self-refresh modes The semiconductor memory is facilitated with control circuitry for effecting plural self-refresh modes having respectively different refresh periods. The plural... |
| US-5,467,314 |
Method of testing an address multiplexed dynamic RAM In an address multiplexed dynamic random access memory (RAM) which has both a normal operation mode and a test mode capability, the test mode is initiated in... |
| US-5,467,313 |
Level shifter and data output buffer having same A level shifter and a data output buffer adapted for use in a semiconductor memory device including a memory cell for storing data, a sense amplifier for... |
| US-5,467,312 |
Random access memory A current sensing read arrangement for a static random access memory in which critical nodes in the sensing arrangement are equalised before read-out commences,... |
| US-5,467,311 |
Circuit for increasing data-valid time which incorporates a parallel
latch This invention relates generally to the accessing of random access access memory arrays and, more specifically to circuits and techniques for increasing the data... |
| US-5,467,310 |
EEPROM and EEPROM reading method An electrically programmable and electrically erasable non-volatile semiconductor memory device having an array of single transistor cells is provided. The... |
| US-5,467,309 |
Semiconductor nonvolatile memory device having reduced switching
overhead time on the program mode A semiconductor nonvolatile memory device capable of reducing the overhead time of the time required for switching the verify operation and the verify operation... |
| US-5,467,308 |
Cross-point eeprom memory array A cross-point EEPROM memory array includes a semiconductor substrate (10) having first and second bit-lines (32, 34) spaced apart by a channel region (36). A... |
| US-5,467,307 |
Memory array utilizing low voltage Fowler-Nordheim Flash EEPROM cell A Flash EEPROM memory array includes a plurality of transistor memory cells (24) arranged in rows and columns. The sources of the transistors (24) are connected... |
| US-5,467,306 |
Method of using source bias to increase threshold voltages and/or to
correct for over-erasure of flash eproms The method of this invention allows use of a smaller wordline voltage Vp1 during programming. In addition, the method results in a relatively narrow distribution... |
| US-5,467,305 |
Three-dimensional direct-write EEPROM arrays and fabrication methods A three-dimensional memory cell, suitable for electrically erasable programmable read only memories (EEPROMS), which has direct-write cell capability is... |
| US-5,467,304 |
Semiconductor integrated circuit A semiconductor integrated circuit has an identification code indicative of the classification of the product given at or after an assembling process. The... |
| US-5,467,303 |
Semiconductor memory device having register groups for writing and
reading data A semiconductor memory device comprises an array of memory cell units, each of which has a plurality of MOS transistors connected in series and a plurality of... |
| US-5,467,302 |
Semiconductor memory device Bit lines BL0 and /BL0 are connected to a sense amplifier SA0, the gate of a first MOS transistor to a first word line WL0, a first electrode of a first... |
| US-5,467,300 |
Grounded memory core for Roms, Eproms, and EEpproms having an address
decoder, and sense amplifier The invention is an improved bank select read only memory in which the bit lines and virtual ground lines are all precharged to ground instead of being... |
| US-5,467,299 |
Divider and microcomputer including the same A subtraction-shift-type divider using a dividend or partial remainder represented by signed digits taking any of the values -1, 0, 1 and a divisor by twos... |
| US-5,467,298 |
Multivalued adder having capability of sharing plural multivalued signals A multivalued adder for processing addition of a first data and a second data, which are one of binary logic and multivalued logic, includes a first and second... |
| US-5,467,297 |
Finite field inversion An inversion circuit (212) determines an inverse B.sup.-1 of an m-bit symbol B, the symbol B being expressed in a dual basis representation. Inversion circuit... |
| US-5,467,296 |
High-speed small digital multiplier A digital multiplier absolutizes a multiplicand and a multiplier for decreasing component bits thereof, and multiplies the absolutized multiplicand by the... |
| US-5,467,295 |
Bus arbitration with master unit controlling bus and locking a slave
unit that can relinquish bus for other... A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to... |
| US-5,467,294 |
High speed, low power direct digital synthesizer A method and apparatus suitable for generating programmable digital sine waves which involves converting the output of a direct digital synthesizer or... |
| US-5,467,293 |
System and method for associative solid sectioning during drafting of
geometric models A system and method for associative solid sectioning during drafting of geometric solid models is shown which automatically generates a section view of a solid... |
| US-5,467,292 |
Logical operation method employing parallel arithmetic unit A logical operation method for evaluating a train of output data to be obtained when a plurality of input patterns are successively applied to a memory element... |
| US-5,467,291 |
Measurement-based system for modeling and simulation of active
semiconductor devices over an extended operating... A modeling system for active semiconductor devices, such as gallium arsenide field effect transistors, for nonlinear (e.g., harmonic balance) circuit simulation.... |
| US-5,467,290 |
Survey system and method A survey system including a survey instrument operable to receive signals indicating the Easting, Northing and elevation of a surveyed point. The survey... |
| US-5,467,289 |
Method of and an apparatus for measuring surface contour A measurement-datum similar to profile of a measuring object set in a measuring area in which a detector and the measuring object are moved relatively is formed... |
| US-5,467,288 |
Digital audio workstations providing digital storage and display of
video information The invention disclosed herein is a digital audio workstation for the audio portions of video programs. It combines audio editing capability with the ability to... |
| US-5,467,287 |
Enthalpy calculator A method and apparatus for controlling an environmental parameter is disclosed. The apparatus includes a source of energy controlled air and a source of external... |
| US-5,467,286 |
Metering unit with downloadable firmware Firmware is downloaded to a metering unit located in a distributed power network carrying a power-related waveform, where the metering unit senses power-related... |
| US-5,467,285 |
Method and system for optimizing material movement within a computer
based manufacturing system A method and system for determining an optimal material movement product path within a computer based manufacturing system is disclosed. A transport matrix is... |
| US-5,467,284 |
Obstacle detection system for motor vehicle An obstacle detection apparatus for a motor vehicle detects another vehicle traveling in front of the vehicle as an obstacle. The apparatus has a first unit,... |
| US-5,467,283 |
Obstacle sensing apparatus for vehicles An obstacle sensing apparatus for vehicles is provided in which detection of obstacles is performed efficiently by predicting the traveling path of the vehicle... |
| US-5,467,282 |
GPS and satellite navigation system A satellite-based navigation system providing improved accuracy and reliability over wide geographical areas, including remote regions, is disclosed.... |
| US-5,467,281 |
Controller for power steering apparatus A controller for a power steering apparatus in which operation fluid for generating assist torque is pumped by a motor-driven pump. The controller controls the... |
| US-5,467,280 |
Vehicular suspension system utilizing variable damping force shock
absorber A vehicular suspension system comprises a variable damping force shock absorber utilizing a variable semiactive hydraulic damper having a plurality of different... |
| US-5,467,279 |
Motor-assisted power steering control device A motor for a motor-assisted power steering device is controlled with a control value which is obtained by detecting an error between an actual steering torque... |
| US-5,467,278 |
Electric control apparatus for four-wheel steering system An electric control apparatus for a four-wheel steering system of an automotive vehicle having a front wheel steering mechanism for a set of dirigible front road... |
| US-5,467,277 |
Apparatus and method for automobile control using a control
characteristic which can be adjusted by the driver The present specification discloses a control system for an automobile. An automobile control system according to the present invention is provided in an... |
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