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| Patent # | Description |
|---|---|
| US-5,499,399 |
Two-dimensional kernel adaptive interference suppression system A two-dimensional interference suppression system utilizes adaptive locally optimum detection algorithms derived from kernel estimation. By using these... |
| US-5,499,398 |
Wristwatch-type selective calling receiver A selective calling receiver comprises two separate bands having an antenna circuit for tuning incorporated therein. The first band has a first antenna and... |
| US-5,499,397 |
Switched antenna diversity algorithm employing received signal strength,
phase errors and recovered clock The present invention comprises a method and apparatus for selecting one of at least two antennas (202, 204) in a communication unit (200) for use in a wireless... |
| US-5,499,396 |
Transmission device for transmitting a wanted signal modulated on a
carrier Wired into the transmission path (2) of a transmission arrangement (1) to transmit a useful signal (NS), especially an audio or data signal, that is modulated... |
| US-5,499,395 |
Cellular mobile communication system having apparatus for changing
boundaries of cells according to traffic... Cellular mobile communication system includes a plurality of base stations connected to a relay station, each base station having adaptability for coping with... |
| US-5,499,394 |
Filter switching circuit A filter switching circuit for switching between two or more filters. The filter switching circuit may be integrally formed upon an integrated circuit chip and... |
| US-5,499,393 |
Receiver with function to adjust local frequency following reception
frequency A receiver which has a linear approximation expression showing a relationship between the frequency deviations and corresponding changes to the voltage which is... |
| US-5,499,392 |
Filter having a variable response time for filtering an input signal A tunable filter (25) is described for use in loop control circuits. The filter (25) has a time constant which is determined by a resistor (40) and a capacitor.... |
| US-5,499,391 |
Digital channelized IFM receiver An instantaneous frequency measurement receiver (IFM) is used at each output of a digital channelized receiver. A Fast Frequency Transform (FFT) is used to form... |
| US-5,499,390 |
Controlled device for removing the anus of slaughtered animals A device for removing the anus of slaughtered animals. The device includes a cutting device for cutting out the anus of a slaughtered animal, which cutting... |
| US-5,499,389 |
Method of compensating the dependence of the useful transmitter signal
on the transfer function of a combiner... A method of compensating the dependence of the useful transmitter signal on the transfer function of a combiner filter in a mobile radio communication system... |
| US-5,499,388 |
Radio with frequency scanning and interference detection capability for
remote controlled model aircraft A remote control system for use with model aircraft provides a user with the capability of placing the remote control system into a scanning mode wherein a... |
| US-5,499,387 |
Handoff method wherein stored measured information is transferred
between base stations The invention relates to a method in connection with handoff in a mobile radio communication system comprising at least one mobile station and a set of base... |
| US-5,499,386 |
Best server selection in layered cellular radio system A multi-level layered cellular radio architecture serves mobile subscriber stations moving within the system. Best server selection is performed for the mobile... |
| US-5,499,385 |
Method for accessing and transmitting data to/from a memory in packets A method of transmitting digital information to a memory circuit of a plurality of memory circuits of a computer system through a multiline bus of the computer... |
| US-5,499,384 |
Input output control unit having dedicated paths for controlling the
input and output of data between host... An I/O controller (IOU) is provided for transferring dam between a host processor and one or more I/O devices. The I/O controller includes means for enabling... |
| US-5,499,383 |
DMA control device controlling sequential storage of data A DMA transfer of 8-bit units and 16-bit units can be performed regardless of the proceeding direction of the address and whether the first address to be... |
| US-5,499,382 |
Circuit and method of bit-packing and bit-unpacking using a barrel
shifter A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table.... |
| US-5,499,381 |
Electronic apparatus with interchangeable peripheral device and a
processor interrupt feature An electronic apparatus with an interchangeable peripheral device, in which, when the interchangeable peripheral device is changed, a corresponding signal is... |
| US-5,499,380 |
Data processor and read control circuit, write control circuit therefor A shift circuit 213 used in arithmetic operations is provided with the shift width generating circuit 217 which generates a shift width data from lower bits of... |
| US-5,499,379 |
Input/output execution apparatus for a plural-OS run system A plural-OS run system in which a plurality of operating systems (OSs) capable of operating on machines of different architectures, respectively, are allowed to... |
| US-5,499,378 |
Small computer system emulator for non-local SCSI devices A SCSI computer system is provided whereby a host computer gains access to a targeted but non-local peripheral device, which device or devices are individually... |
| US-5,499,377 |
Multi-computer access switching system A switching system is provided to enable selective access from a work center W to any of a plurality of computers PC1-PC16. Connections are provided from .the... |
| US-5,499,376 |
High speed mask and logical combination operations for parallel
processor units A computer system having a plurality of parallel processor units with each processor unit having an output bus of n bits and an associated mask register is... |
| US-5,499,375 |
Feedback register configuration for a synchronous vector processor
employing delayed and non-delayed algorithms A Serial Video Processor (SVP) is provided for processing data through a plurality of parallel processing elements (228). Data is first stored in a data input... |
| US-5,499,374 |
Event driven communication network A cost-effective motion control system communication architecture is provided that supports a centralized control node, distributed control nodes, and smart I/O... |
| US-5,499,373 |
Apparatus and methods for designing, analyzing or simulating signal
processing functions Data to be processed is stored within data files 20. Associated with each data file 20 is a header file 18. The header files 18 store data specifying a wide... |
| US-5,499,372 |
Method of controlling access to restricted access data and communication
system therefor In electronic communication systems, negotiations are performed between two pieces of apparatus (e.g. modems) in order to ensure technical compatibility during... |
| US-5,499,371 |
Method and apparatus for automatic generation of object oriented code
for mapping relational data to objects A method and apparatus are provided for using an object model of an object-oriented application to automatically map information between an object-oriented... |
| US-5,499,370 |
Image forming system with task scheduling and executing back on program
and control poriority status of... An image processing system includes a plurality of memories for storing (1) a procedure control program and (2) a task program for automatic closed loop control.... |
| US-5,499,369 |
Method and system for connecting objects using alert and running states Method and system for connecting link object to a link source. In a preferred embodiment, a source process registers the link source in a running object table... |
| US-5,499,368 |
Scaled depiction of information from a database A method, system and program providing scaled depiction of information from a database. In a preferred form, tables and lists are obtained from a database and... |
| US-5,499,367 |
System for database integrity with multiple logs assigned to client
subsets The present invention provides a distributed log system where the logs are distributed on a per client basis. That is, the clients are partitioned into subsets.... |
| US-5,499,366 |
System and methods for generation of design images based on user design
inputs The present invention provides an expert system for suggesting and providing graphic design selections based on a user's desired result. The invention provides a... |
| US-5,499,365 |
System and method for controlling versions of objects in an object
oriented computing environment A system and method for controlling versions of selected objects in an object oriented computing system includes a common logical key attribute in each version... |
| US-5,499,364 |
System and method for optimizing message flows between agents in
distributed computations A distributed computation system has a set of agents that perform each specified distributed computation. State transition events in each agent are conditioned... |
| US-5,499,363 |
Microprocessor coupled to coprocessor by coprocessor bus separate from
system bus to external memory for... A microprocessor, which can be coupled externally with a coprocessor in order to extend an instruction set, includes a first set of terminals to be coupled to... |
| US-5,499,362 |
Image processing apparatus In an image processing apparatus, when a hard copy of image data displayed on a display with reduced gradation and non-image data displayed on the display is... |
| US-5,499,361 |
Density processing method The present invention is directed to a density processing method in which input gray level-output gray level data are previously generated and stored a first... |
| US-5,499,360 |
Method for proximity searching with range testing and range adjustment A method of searching a database having a plurality of objects is provided. Each object includes attributes and, for each attribute, a number of values. A query... |
| US-5,499,359 |
Methods for improved referential integrity in a relational database
management system A system of the present invention includes a PC-based relational database management system (PC RDBMS) with data integrity facilities. Methods are described for... |
| US-5,499,358 |
Method for storing a database in extended attributes of a file system The present invention provides a definition, format, and structure of extended attributes for managing, maintaining, and controlling file systems. This is... |
| US-5,499,357 |
Process for configuration management In a process for ensuring compatibility of components in a system, system components are defined and relationships between two or more system components... |
| US-5,499,356 |
Method and apparatus for a multiprocessor resource lockout instruction A method and apparatus for providing a resource lockout mechanism in a shared memory, multiprocessor system that is capable of performing both a read and write... |
| US-5,499,355 |
Prefetching into a cache to minimize main memory access time and cache
size in a computer system A cache subsystem for a computer system having a processor and a main memory is described. The cache subsystem includes a prefetch buffer coupled to the... |
| US-5,499,354 |
Method and means for dynamic cache management by variable space and time
binding and rebinding of cache extents... Dynamic allocation of read cache space is allocated among bands of DASD cylinders rather than to data sets or processes as a function of a weighted average hit... |
| US-5,499,353 |
Cache address strobe control logic for stimulated bus cycle initiation A cache control system generates an alternate cache control signal to unload a CPU driven bus control signal without interfering with the bus control of the... |
| US-5,499,352 |
Floating point register alias table FXCH and retirement floating point
register array A Register Alias Table (RAT), including a retirement floating point RAT array, for floating point register renaming within a superscalar microprocessor capable... |
| US-5,499,351 |
Arrangement of detecting branch error in a digital data processing system A signal which requires an interruption of execution of program instructions stored in a memory, is produced. The program instructions include an entry point... |
| US-5,499,350 |
Vector data processing system with instruction synchronization An information processing system including an arithmetic unit in which one unit of data is processed according to a corresponding one instruction, and another... |
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