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| Patent # | Description |
|---|---|
| US-5,568,104 |
Open MRI superconductive magnet with cryogenic-fluid cooling An open magnetic resonance imaging (MRI) magnet having first and second spaced-apart superconductive coil assemblies each including a toroidal-shaped coil... |
| US-5,568,103 |
Current control circuit of ring oscillator A current control circuit of a ring oscillator is provided for use in the PLL oscillators. A current control circuit used in the ring oscillator comprises a... |
| US-5,568,102 |
Closed superconductive magnet with homogeneous imaging volume A closed magnetic resonance imaging (MRI) magnet has a single superconductive coil assembly including a toroidal-shaped coil housing containing a pair of... |
| US-5,568,101 |
Distributed constant type multiple-line circuit A distributed constant type multiple-line circuit is described which comprises a dielectric block (60) having shield conductors (62,64) on its rear surface and... |
| US-5,568,100 |
Synchronous power down clock oscillator device This invention provides a synchronous, power down oscillating device that provides only uniform pulses having no glitches at its output. The circuit is able to... |
| US-5,568,099 |
High frequency differential VCO with common biased clipper A VCO includes a ring oscillator formed by connecting a plurality of voltage controlled inverting delay cells together, a biasing circuit for providing a bias... |
| US-5,568,098 |
Frequency synthesizer for use in radio transmitter and receiver A phase comparator (91) makes a phase comparison between a frequency-divided signal from a frequency divider (98) and a reference oscillation signal from a... |
| US-5,568,097 |
Ultra high availability clock chip A single reliable clock source that can be shared by all cards in a multiple card assembly. The clock delivers synchronous clock signals, so that there is no... |
| US-5,568,096 |
Apparatus and method for using negative FM feedback in high quality
oscillator devices An apparatus and method are provided for increasing the effective Q-value of an oscillator so that the required Q-value can be reached with the use of a low... |
| US-5,568,095 |
Balanced oscillator and transmitter arrangement The present invention teaches an oscillator and transmitter. The balanced oscillator comprises a resonator for generating a reference signal having a resonating... |
| US-5,568,094 |
Rf power amplifier with increased efficiency at low power An apparatus and method is provided that uses a simple voltage ratio technique to supply specific voltages to a voltage variable attenuator, and the gates of a... |
| US-5,568,093 |
Efficient, high frequency, class A-B amplifier for translating low
voltage clock signal levels to CMOS logic levels A power efficient class A-B amplifier provides 20 dB amplification for a low capacitive load such as a 40 to 80 MHz clock signal in a crystal oscillator circuit.... |
| US-5,568,092 |
Attenuated feedback type differential amplifier A differential amplifier includes an input stage for receiving input signals, an output stage for generating output signals, and an attenuating circuit for... |
| US-5,568,091 |
Differential amplifier with common-mode rejection for low supply voltages A differential amplifier with common-mode rejection for low supply voltages has a first and a second differential pair without transistors in the tails of the... |
| US-5,568,090 |
Amplifier circuit with dynamic output stage biasing An amplifier circuit is disclosed having circuitry that senses an electrical current at the output node while dynamically adjusting a bias current for an output... |
| US-5,568,089 |
Fully differential amplifier including common mode feedback circuit In a fully differential amplifier so configured that an operating point potential of positive and negative output terminals of a differential amplifier having an... |
| US-5,568,088 |
Waste energy control and management in power amplifier An amplifying apparatus for linearly amplifying a desired signal using a pair of coupled non-linear amplifiers is disclosed. The amplifying apparatus comprises a... |
| US-5,568,087 |
Pre-distorting linearization circuit The invention concerns a pre-distorting linearization circuit, comprising a splitter circuit with an input forming the input of the linearization circuit and... |
| US-5,568,086 |
Linear power amplifier for high efficiency multi-carrier performance A Doherty-type power amplifier suitable for satellite telecommunication systems provides linear amplification of noise-like RF signals that have multiple... |
| US-5,568,085 |
Unit for stabilizing voltage on a capacitive node A unit for stabilizing the voltage on a capacitive node of a memory array, such as a common node bit line (CNBL), is disclosed. The unit includes an amplifier... |
| US-5,568,084 |
Circuit for providing a compensated bias voltage A bias circuit for generating a bias voltage over variations in the power supply voltage and over process parameters is disclosed. The bias circuit utilizes a... |
| US-5,568,083 |
Semiconductor integrated circuit device having an internally produced
operation voltage matched to operation... The semiconductor integrated circuit device incorporates a power supply circuit which forms an operation voltage that matches the operation speed of the internal... |
| US-5,568,082 |
Signal-receiving and signal-processing unit A signal-receiving and signal-processing unit connected to one or several conductors is configured to transmit information-carrying signals in the form of... |
| US-5,568,081 |
Variable slew control for output buffers A variable slew control for output circuits is disclosed. The slew control circuit automatically adjusts the rate in which voltage on a slew node is driven to a... |
| US-5,568,080 |
Computational circuit A computational circuit that includes a selector for providing an input to one of a plurality of sample/hold circuits. The outputs of the sample/hold circuits... |
| US-5,568,079 |
Step-up method and step-up circuit A step-up circuit involves a short step-up time and improved step-up efficiency. The step-up circuit has capacitors. First and second power source voltages are... |
| US-5,568,078 |
Clock delay compensating and duty controlling apparatus of a
phase-locked loop For clock delay compensation and duty control of a phase-locked loop in a decoder of a video signal receiving system, phases of two input clocks received into a... |
| US-5,568,077 |
Latch circuit A latch circuit comprises, as a circuit corresponding to 1 bit, a flip-flop 50 which is composed of a plurality of NAND gates 11a, 11b, and holds a given signal... |
| US-5,568,076 |
Method of converting short duration input pulses to longer duration
output pulses Output signals from a plurality of self reset CMOS a logic circuits are multiplexed by means of the plurality of input multiplex circuits and an output circuit.... |
| US-5,568,075 |
Timing signal generator A programmable, timing signal generator propagates a digital wave along a delay chain comprised of series connected inverters that has sufficient stages that the... |
| US-5,568,074 |
Voltage monitoring circuit The positive input terminal (1), the negative input terminal (2) and the differential amplifier (10) are connected to the voltage converting circuit (9a). The... |
| US-5,568,073 |
Data comparing sense amplifier According to the present invention, the delay associated with a logic stage external to a sense amplifier is eliminated by absorbing the logic state into the... |
| US-5,568,072 |
Circuit indicating the phase relation between several signals having the
same frequency A circuit, indicating the first or last signal activated among n signals, includes flip-flops respectively associated with pairs of signals, a first signal of... |
| US-5,568,071 |
Pulse phase difference encoding circuit A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first... |
| US-5,568,070 |
Multiplexer w/ selective switching for external signals A multiplexer includes three switching divisions each of which has one terminal connected to each of the signal terminals and the other terminal connected to a... |
| US-5,568,069 |
High speed, low power pipelined logic circuit A complementary pipelined logic circuit includes (a) a logic unit that processes a plurality of complementary inputs into a pair of complementary outputs, (b) a... |
| US-5,568,068 |
Buffer circuit for regulating driving current A buffer circuit with driving current adjusting function is provided which may automatically set a driving current characteristics of a buffer to the most... |
| US-5,568,067 |
Configurable XNOR/XOR element A configurable XNOR/XOR logic element is used, in an exemplary embodiment, in an array of spare gates included in a processor or other integrated circuit. The... |
| US-5,568,066 |
Sense amplifier and or gate for a high density programmable logic device A high density programmable logic device (PLD) having sense amplifiers and OR gates configured to increase operation speed and reduce transistor count from... |
| US-5,568,065 |
Circuit for connecting a node to a voltage source selected from
alternative voltage sources A circuit connects a circuit node to a voltage source selected between two alternative power supply voltage sources. The circuit includes two transistors,... |
| US-5,568,064 |
Bidirectional transmission line driver/receiver A method and apparatus are disclosed for sending and receiving logic signals responsive to external digital data input and control signals. A reference circuit... |
| US-5,568,063 |
Signal transmitting device, circuit block and integrated circuit suited
to fast signal transmission A signal transmitting circuit includes one or more circuit blocks having a driving circuit and an intra-block transmission line for transmitting a signal... |
| US-5,568,062 |
Low noise tri-state output buffer A buffer circuit includes a pair of pull-up output transistors and a pair of pull-down output transistors driving an output line. Each output transistor is... |
| US-5,568,061 |
Redundant line decoder master enable A master enable circuit is provided which receives multiple enable signal inputs while matching the redundant decoder enable delay with decoder enable delay. A... |
| US-5,568,060 |
Circuit board insertion circuitry for high reliability backplanes Circuit board insertion circuitry is used in conjunction with a staggered electrical connector. The insertion circuitry includes an isolated circuit which... |
| US-5,568,059 |
Current sensor and motor rotation sensor using such current sensor The present invention relates to a current sensor for detecting current flowing in a current line, and a motor rotation sensor which utilizes this current... |
| US-5,568,058 |
Automatic motor tester An automatic motor tester runs performance and quality control checks on newly assembled motors. The motor tester includes a vertical support, contacts contained... |
| US-5,568,057 |
Method for performing a burn-in test An apparatus for burn-in test comprising, a socket body including an accommodation groove in which an integrated circuit chip is accommodated to be tested, a... |
| US-5,568,056 |
Wafer prober A test head is rotatably supported by a main body of device. This test head is rotatable between an inspecting position electrically connected to a probe card... |
| US-5,568,055 |
Adiabatic conductor analyzer method and system A method for detecting and locating constrictions in electrical conductors of predetermined normal cross-section. A test or reference resistance reading is made... |
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