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Patent # Description
US-5,689,725 System for generating status signals of second bus on first bus by comparing actual phase of the second bus...
The present invention is therefore directed to enhancing the efficiency with which input/output controllers execute operations in response to requests from...
US-5,689,724 Generic font specification leading to specific font selection
A generic font request is changed to an operating system specific format font request. A font request is received from an application by a font handler. Both the...
US-5,689,723 Method for allowing single-byte character set and double-byte character set fonts in a double-byte character...
The method of the invention allows both single-byte character set (SBCS) and double-byte character set (DBCS) fonts in a DBCS code page. The invention stores the...
US-5,689,722 Multipipeline multiprocessor system
The multipipeline multiprocessor includes communication hardware and parallel communication algorithms that are free of contention but also optimal in the sense...
US-5,689,721 Detecting overflow conditions for negative quotients in nonrestoring two's complement division
A method of detecting anomalous overflow conditions is used, in an exemplary embodiment, in implementing in a 486-type microprocessor, nonrestoring two's...
US-5,689,720 High-performance superscalar-based computer system with out-of-order instruction execution
A high-performance, superscalar-based computer system with out-of-order instruction execution for enhanced resource utilization and performance throughput. The...
US-5,689,719 Parallel computer system including processing elements
A parallel computer system includes a plurality of processing elements each comprising a network control unit. The network control unit of the processing element...
US-5,689,718 System and method for processing document information using password protected icons that represent document...
A documentary information processing system for creating and editing a multimedia document. Document files are correspondingly associated with icons symbolizing...
US-5,689,717 Method and apparatus for the placement of annotations on a display without overlap
A method and system for placing annotations of various sizes on a display without overlapping the annotations is described. Each annotation is represented by its...
US-5,689,716 Automatic method of generating thematic summaries
A technique for automatically generating thematic summaries for machine readable representations of documents. The technique begins with determining the number...
US-5,689,715 Low power ring detect for computer system wake-up
A computer system having a CPU, a power management processor, a modem, and a power supply in circuit communication. The power management processor controls the...
US-5,689,714 Method and apparatus for providing low power control of peripheral devices using the register file of a...
A method and apparatus for providing low power management of a data processing system (FIG. 1) involves a CPU (12) communicating to a register file (16) in a...
US-5,689,713 Method and apparatus for interrupt communication in a packet-switched computer system
An apparatus and method for handling interrupt requests from any of a plurality of interrupters to any of a plurality of interrupt handlers. Each interrupt...
US-5,689,712 Profile-based optimizing postprocessors for data references
The present invention is a system and process for optimizing programs, having memory references, at the object code level. The process includes the...
US-5,689,711 Method and apparatus for representing data dependencies in software modeling systems
A method and apparatus for converting a set of functions of any software system that does modeling into a corresponding set of parametric functions that, when...
US-5,689,710 Protected mode C binding for PCMCIA card services interface
A library of C functions to perform PCMCIA Card Services. A PCMCIA Card Services specification defines a set of functions which allow applications and device...
US-5,689,709 Method and system for invoking methods of an object
A computer method and system for invoking a function member of an object that is exposed to a client computer program by a source computer program are provided....
US-5,689,708 Client/server computer systems having control of client-based application programs, and application-program...
A resource manager in a client/server computer network controls the availability of system resources. A system administrator generates a set of profiles which...
US-5,689,707 Method and apparatus for detecting memory leaks using expiration events and dependent pointers to indicate when...
The invention utilizes expiration events and dependent pointers to indicate when the corresponding memory allocation should be de-allocated. Expiration events...
US-5,689,706 Distributed systems with replicated files
Techniques for providing replicated files in a distributed system. A replicated file has a set of copies in components of the distributed system. Operations on...
US-5,689,705 System for facilitating home construction and sales
A system for facilitating the information transfer and processing associated with home construction and home sales. Various discrete software modules are...
US-5,689,704 Recording medium, recording/playback device which uses commands in character string form for audio system control
To make possible interactive control operations in a device such as a minidisc system which uses a recording medium on which character information can be...
US-5,689,703 Method and system for referring to and binding to objects using identifier objects
A method and system for referring to and binding to objects using a moniker object is provided. In a preferred embodiment, a moniker object contains information...
US-5,689,702 Flexible data structure layout for data structure including bit-field data members
The invention produces data structure layout in a flexible manner that enables the data structures of a computer program to be layed out in a manner that...
US-5,689,701 System and method for providing compatibility between distributed file system namespaces and operating system...
A system and method facilitating an operating system user's ability to reference objects in a distributed file system having an incompatible namespace....
US-5,689,700 Unification of directory service with file system services
A software system unifies directory services with the file system. Directory service entries and other files are all stored in a common logical format, such as...
US-5,689,699 Dynamic verification of authorization in retention management schemes for data processing systems
In a retention management scheme, an object, such as a document or folder, is provided with an expiration time in the form of a time stamp attribute. The...
US-5,689,698 Method and apparatus for managing shared data using a data surrogate and obtaining cost parameters from a data...
A method and apparatus for providing access to object data stored in an object server in response to a database query. The method comprises the steps of...
US-5,689,697 System and method for asynchronous database command processing
A system and method for asynchronously processing SQL language statements in a database management system. A process assigns a unique database handle to each...
US-5,689,696 Method for maintaining information in a database used to generate high biased histograms using a probability...
A method maintains information associated with items in a database of limited memory which information is used to generate representations of the information...
US-5,689,695 Conditional processor operation based upon result of two consecutive prior processor operations
This invention performs conditional operations and conditional branches based upon mixed conditions. The invention performs a first arithmetic/logical operation...
US-5,689,694 Data processing apparatus providing bus attribute information for system debugging
The data processing apparatus which outputs information regarding the prefetching of an instruction in the destination of a branch instruction prior to the...
US-5,689,693 Range finding circuit for selecting a consecutive sequence of reorder buffer entries using circular carry lookahead
A enable circuit (700), employing a "circular carry lookahead" technique to increase its speed performance, is provided for applying two pointers to a circular...
US-5,689,692 Method and apparatus for decoding an encoded NRZ signal
A bit serial decoder is disclosed decoding an encoded non-return to zero (NRZ) signal without the use of external clock. Transitions within the encoded NRZ...
US-5,689,691 Computer bus utilization determination apparatus
Circuitry for monitoring the idle periods on the EISA bus and a program using this known value to determine percentage utilization of the EISA bus. A counter is...
US-5,689,690 Timing signal generator
A timing signal generator includes a voltage controlled oscillator (VCO), a logic circuit, N set circuits and N reset circuits and a bistable latch circuit. The...
US-5,689,689 Clock circuits for synchronized processor systems having clock generator circuit with a voltage control...
A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit...
US-5,689,688 Probabilistic anonymous clock synchronization method and apparatus for synchronizing a local time scale with a...
A method is provided for synchronizing local times, maintained at nodes within a network architecture, with a reference time. A node according to the invention...
US-5,689,687 Electronic device
An electronic device includes a short-term data storing section for storing short-term data which represents a short-term scheduled event and includes graphic...
US-5,689,686 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability
Methods for designing a programmable interconnect matrix having reduced connectivity to achieve maximum routability for the reduced connectivity. An array of...
US-5,689,685 Apparatus and method for analyzing circuits using reduced-order modeling of large linear subscircuits
A circuit analyzer and method are disclosed for generating and outputting a Matrix Pade via Lanczos (MPVL) approximation of a frequency response of a circuit...
US-5,689,684 Method and apparatus for automatically reconfiguring a host debugger based on a target MCU identity
A Host Debugger and a Modular Development System (MDS) are dynamically reconfigured. The Host Debugger queries the MDS for the identity of its Target MCU. The...
US-5,689,683 Hardware simulator capable of dealing with a description of a functional level
In a logic simulator for simulating a logic circuit described by sentences, each specifying at least one operation and at least two variables which should be...
US-5,689,682 Computerized flight simulation control sampling and production system and method
A high-quality motion simulation based on the sampled simulated motion of a piloted object or vehicle and a system to provide visual information to teach a user...
US-5,689,681 System for reading dynamically changing data supporting partial reads of storage locations
A mechanism is provided that allows partial reading of storage locations, such as statistics counters, by providing a temporary read data storage latch on a...
US-5,689,680 Cache memory system and method for accessing a coincident cache with a bit-sliced architecture
A "bit-sliced" construction cache module dictates dual TAG RAM Structures and dual invalidation queues, yielding enhanced performance: putting half the TAG array...
US-5,689,679 Memory system and method for selective multi-level caching using a cache level code
A selective multilevel caching method and system including a main memory and a plurality of cache memories are disclosed. The main memory and cache memories are...
US-5,689,678 Distributed storage array system having a plurality of modular control units
A RAID-compatible data storage system which allows incremental increases in storage capacity at a cost that is proportional to the increase in capacity. The...
US-5,689,677 Circuit for enhancing performance of a computer for personal use
A circuit for modifying an instruction stream comprises a first logic circuit capable of issuing instructions and a second logic circuit means responding to the...
US-5,689,676 Sequential EEPROM writing apparatus which sequentially and repetitively replaces a head position pointer with a...
A storage device incorporating an electrically erasable read only memory (EEPROM) or other data storage device having a limited number of total times of...
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