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| Patent # | Description |
|---|---|
| US-5,923,225 |
Noise-reduction systems and methods using photonic bandgap crystals Active electronic circuits are immersed in photonic bandgap crystals (PBC's) that form part of transmission lines for propagation of output signals of the... |
| US-5,923,224 |
Nonreciprocal circuit device One or two inductor electrodes formed of hairpin-bent or curved electrode patterns are made on one main surface of a component member of a nonreciprocal circuit... |
| US-5,923,223 |
Transmission system in which either an in-phase or quadrature component
of a transmitted signal is delayed... A transmission system and a transmitter (T) for such a system are disclosed for transmitting a digital signal (sr), encoded in symbols (Si), from the transmitter... |
| US-5,923,222 |
Low power amplifier and an oscillating circuit incorporating the
amplifier An oscillating circuit includes a low power inverting amplifier (10) having an input (208) and an output (209) and having a relatively high resistance d.c.... |
| US-5,923,221 |
Oscillator for digital ATV signals having low phase noise An oscillator operable in the gigaHertz range includes a transistor having an emitter coupled to a tank circuit and an additional feedback path coupling the tank... |
| US-5,923,220 |
Clock reproducing device and clock reproducing method, which utilize a
frequency difference and receiving interval The clock reproducing device includes a control device which generates a control signal for decreasing a clock frequency difference between a transmitter and a... |
| US-5,923,219 |
Automatic threshold control circuit and signal amplifying circuit for
amplifying signals by compensating for... An automatic threshold control circuit includes a bottom detection circuit, a relative peak detection circuit, and a voltage divider circuit. The bottom... |
| US-5,923,218 |
Device with amplifier means including safety means, and with filter
means connected to the amplifier means In a device comprising an amplifier with short circuit protection, and a resistor-capacitor (RC) filter connected to the amplifier output, an inductor is... |
| US-5,923,217 |
Amplifier circuit and method for generating a bias voltage A low-noise amplifier circuit (40) and a method for generating a bias voltage within the amplifier circuit (40). The amplifier circuit includes a cascode... |
| US-5,923,216 |
Frequency selective amplifier circuit An amplifier especially suitable for use as a reading-head amplifier in a disc drive employing a magnetoresistive sensor. The amplifier is capable of injecting a... |
| US-5,923,215 |
Linearized amplifier A microprocessor detects input power and output power of a two transistor, Class AB amplifier, and provides an adapted bias level of the transistors which has... |
| US-5,923,214 |
Feedforward amplifier network with swept pilot tone for reducing
distortion generated by a power amplifier A feedforward amplifier network (42) generates a fixed offset frequency swept pilot tone (46) over at least the same frequency band as an input signal (40). The... |
| US-5,923,213 |
Digitally gain-controlled amplifying device, and camera using such a
device An amplifying device has a decibel gain that evolves quasi-linearly as a function of the digital value of a control word C(O:M-1). The device includes: an... |
| US-5,923,212 |
Bias generator for a low current divider A voltage divider is protected from current paths created by parasitic devices. The voltage divider includes a first string of diode-connected MOS transistors... |
| US-5,923,211 |
Reference voltage generation scheme for gate oxide protected circuits A reference voltage generation circuit is provided for use in gate oxide protected circuits for generating an NMOS reference voltage and PMOS reference voltage... |
| US-5,923,210 |
High side driver circuit with diagnostic output A high side driver circuit includes a command voltage source, a first switching transistor having a base connected to the command voltage source, an emitter... |
| US-5,923,209 |
Two trim current source and method for a digital-to-analog converter A trimmable current cell and method for providing an output current at a desired level which may be used to provide a particular current level for a... |
| US-5,923,208 |
Low voltage temperature-to-voltage converter A temperature-to-voltage converter includes a first circuit for developing a signal having a positive temperature coefficient and a second circuit for developing... |
| US-5,923,207 |
Complementary multiplexer with low disabled-output capacitance, and
method A complementary multiplexer with low disabled output capacitance and method in which a plurality of switched buffers are packaged together to avoid the... |
| US-5,923,206 |
Charge injection cancellation technique An MOS FET circuit with a summing circuit at the input of an amplifier to provide charge cancellation. The summing circuit is capacitively coupled to the input... |
| US-5,923,205 |
Semiconductor arithmetic circuit A semiconductor arithemetic circuit which performs calculation of an analog vector with a high accuracy at a high speed. A semiconductor arithemetic circuit... |
| US-5,923,204 |
Two phase low energy signal processing using charge transfer capacitance A charge transfer from signal voltage (U.sub.S) to integrating capacitance (C.sub.O) is accomplished by means of charge transfer capacitance (C.sub.i), an active... |
| US-5,923,203 |
CMOS soft clipper A soft clipper circuit in CMOS technology not only allows the knee to be programmed, but also the slope of the curve after the knee to be programmed. This is... |
| US-5,923,202 |
Input/output overvoltage containment circuit for improved latchup
protection An I/O current containment circuit capable of protecting a semiconductor device from input current that may cause latchup includes a MOS drive circuit and a... |
| US-5,923,201 |
Clock signal generating circuit A clock signal generating circuit of the present invention switches the threshold value of a buffer circuit included in an output buffer section substantially... |
| US-5,923,200 |
Phase modulator circuit An input signal and a signal obtained by delaying that input signal are compared, an output signal is produced based on the amount of the delay, and the output... |
| US-5,923,199 |
Delay circuit for giving delays of variable width A scale of circuit is reduced when a plurality of variable delay circuits are provided with respect to the same signal. A variable delay circuit is constructed... |
| US-5,923,198 |
High-speed clock-synchronous semiconductor integrated circuit and
semiconductor integrated circuit system A semiconductor integrated circuit has a de-skew circuit for reducing a skew of an incoming signal from a specific circuit with respect to a synchronous clock... |
| US-5,923,197 |
Pulse stuffing circuit for programmable delay line A delay line formed by a set of series-connected logic gates produces a sequence of output pulses in delayed response to a sequence of input pulses. The delay... |
| US-5,923,196 |
Band-selectable phase-locked loop A PLL is provided which is capable of following an input frequency over an extensive range without incurring an increase in the size of circuit arrangement. The... |
| US-5,923,195 |
Fast clock generator and clock synchronizer for logic derived clock
signals with synchronous clock suspension... A programmable device includes a circuit for generating an asynchronous logic derived clock signal derived from one or more of a number of input signals.... |
| US-5,923,194 |
Fast clock generator and clock synchronizer for logic derived clock
signals for a programmable device A programmable device includes means for generating an asynchronous logic derived clock signal from one or more of a plurality input signals. Means for... |
| US-5,923,193 |
Method and apparatus for transferring signals between multiple clock
timing domains Briefly, in accordance with one embodiment, an integrated circuit includes: electronic circuitry for transferring digital data signals along a digital data... |
| US-5,923,192 |
CMOS circuit A CMOS circuit prevents feedthrough current and has a small-scaled circuit constitution. An output stage has a P-channel MOS transistor and an N-channel MOS... |
| US-5,923,191 |
Device and a method for monitoring a system clock signal A system clock signal monitor that monitors a system clock signal by comparing a pulse width of a logic high pulse and a pulse width of a logic low pulse of each... |
| US-5,923,190 |
Phase detector having a sampling circuit A phase detector enables sampling of an input waveform such that a resolution, equivalent to the resolution conventionally obtained by doubling a clock... |
| US-5,923,189 |
Semiconductor integrated circuit comprised of pass-transistor circuits
with different mutual connections For the relation between the first and second pass-transistor circuits (PT1, PT2), the output signal of the preceding-stage is supplied to the gate of the... |
| US-5,923,188 |
Clock signal distribution circuit of tree structure with minimized skew Letting p be a definite integer, q be a varying integer from 1 to p, r be an arbitrary integer such that 1.ltoreq.r.ltoreq.p, and s be a varying integer from 2... |
| US-5,923,187 |
Multidirectional data transmission device The invention offers a data transmission device comprising two lines A and B through which digital data flow whose logic levels are defined for each line A or B... |
| US-5,923,186 |
Two state bi-directional bus The present invention discloses a bi-directional bus system including one or more junction circuits and a plurality of logic blocks wherein each logic block... |
| US-5,923,185 |
Logic circuit programmable to implement at least two logic functions The present invention provides a logic circuit that is programmable to implement a first logic function or a second logic function using as few as four... |
| US-5,923,184 |
Ferroelectric transistor logic functions for programming Ferroelectric transistors are combined with MOSFETs to perform logic functions. The logic functions include a non-volatile ferroelectric latch (30), a clocked... |
| US-5,923,183 |
CMOS output buffer circuit exhibiting reduced switching noise A CMOS output buffer circuit includes a predriving circuit which generates two predriving signals, a main driving circuit which has a plurality of parallel... |
| US-5,923,182 |
Ferroelectric optical computing device with low optical power
non-destructive read-out Photoresponse from a ferroelectric optical computing device, such as a memory cell or a logic switch, is increased by either illuminating the regions of the... |
| US-5,923,181 |
Methods and apparatus for burn-in stressing and simultaneous testing of
semiconductor device chips in a... Methods and apparatus are set forth for burn-in stressing and simultaneous testing of a plurality of semiconductor device chips laminated together in a stack... |
| US-5,923,180 |
Compliant wafer prober docking adapter A compliant wafer prober docking adapter provide compliant docking capability which permits a test head to be floated (to come down) to the top portion of the... |
| US-5,923,179 |
Thermal enhancing test/burn in socket for C4 and tab packaging A test socket used to test an integrated circuit that is mounted to a package or circuit board. The test socket includes a base that supports the integrated... |
| US-5,923,178 |
Probe assembly and method for switchable multi-DUT testing of integrated
circuit wafers A system for testing an integrated circuit on a semiconductor wafer so as to achieve low probe needle contact resistance with low probe needle force and without... |
| US-5,923,177 |
Portable wedge probe for perusing signals on the pins of an IC A portable wedge probe for perusing the signals of an IC is produced by mounting a short row of wedges in a housing that serves the dual purposes of: (1)... |
| US-5,923,176 |
High speed test fixture A high speed test fixture for testing printed circuit board (PCB)-mounted high speed pin grid array (PGA) chips attaches to the solder side (underside) of the... |
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