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| Patent # | Description |
|---|---|
| US-5,923,877 |
Object-oriented programming memory management framework and method An object-oriented memory management framework (10) and method therefor provide for a foreign pointer class (14, 400) and a foreign object class (12) each having... |
| US-5,923,876 |
Disk fault prediction system A layered block device driver for accessing a storage device coupled to a computer system having a platform on which a disk fault prediction application... |
| US-5,923,875 |
Load distributing job processing system A load judging means 21 judges whether or not to receive the job transferred from the job transferring unit 1 based on the calculated result of the load of the... |
| US-5,923,874 |
Resource measurement facility in a multiple operating system complex A reporter facility for reporting data from a sysplex with a plurality of operating system images. The reporter facility comprises one or more data sets in the... |
| US-5,923,873 |
Method for determining server staffing in management of finite server
queueing systems A method determines the number of servers as a function of time required for a finite server queueing system based on a projected load. The number of servers is... |
| US-5,923,872 |
Apparatus for sampling instruction operand or result values in a
processor pipeline An apparatus is provided for sampling values of operands of instructions in a processor pipeline of a system, the pipeline having a plurality of processing... |
| US-5,923,871 |
Multifunctional execution unit having independently operable adder and
multiplier Floating point performance in a VLIW processor is increased through concatenation of two floating point units, one an adder and another a multiplier, which... |
| US-5,923,870 |
Computer having a life-time counter A computer includes a base unit and an upper unit which encloses all electronic components of the computer, such as an LCD display, system board, various drives,... |
| US-5,923,869 |
Method and an apparatus for reproducing bitstream having non-sequential
system clock data seamlessly therebetween A system stream contiguous reproduction apparatus to which are input one or more system streams interleaving at least moving picture data and audio data, and... |
| US-5,923,868 |
Methods for maximizing routability in a programmable interconnect matrix
having less than full connectability Methods for designing a programmable interconnect matrix having reduced connectivity to achieve maximum routability for the reduced connectivity. An array of... |
| US-5,923,867 |
Object oriented simulation modeling A process for object oriented simulation modeling for electronic circuits includes executing at least one setup file for object oriented simulation of an... |
| US-5,923,866 |
Method and apparatus for realizing a keyboard key function on a remote
control A flexible, cost-effective apparatus and method for using a key on a remote control to simulate a keyboard key, i.e. to cause an application, upon pressing the... |
| US-5,923,865 |
Emulation system having multiple emulated clock cycles per emulator
clock cycle and improved signal routing A logic emulation system for emulating the operation of a circuit. A uniform routing architecture is provided where a first set of selectors (multiplexers) is... |
| US-5,923,864 |
Virtual storage address space access control system including auxiliary
translation lookaside buffer A virtual storage address space access control system has an access register having a plurality of access register numbers, a dynamic address translation unit... |
| US-5,923,863 |
Software mechanism for accurately handling exceptions generated by
instructions scheduled speculatively due to... Methods for handling exceptions caused by speculatively scheduled instructions or predicated instructions executed within a computer program are described. The... |
| US-5,923,862 |
Processor that decodes a multi-cycle instruction into single-cycle
micro-instructions and schedules execution... An instruction decoder in a processor decodes an instruction by creating a decode buffer entry that includes global fields, operand fields, and a set of... |
| US-5,923,861 |
Mobile client computer programmed to display drop down scrolling
indicator A display generating system, such as a mobile client computer system, in which a scroll bar is selectively deployed from a less active or "stored" position to a... |
| US-5,923,860 |
Apparatus, method and system for remote peripheral component
interconnect bus using accelerated graphics port... A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port ("AGP") bus... |
| US-5,923,859 |
Dual arbiters for arbitrating access to a first and second bus in a
computer system having bus masters on each bus Arbitration circuitry in a computer system having a plurality of arbiters for arbitrating requests from bus masters on a PCI bus and an EISA bus. Each of the PCI... |
| US-5,923,858 |
Method and apparatus to interface a peripheral device operating in an
internal clock domain to a PCI bus... The present invention is implemented in a peripheral component coupled to a peripheral component interconnect (PCI) bus. The peripheral component includes an... |
| US-5,923,857 |
Method and apparatus for ordering writeback data transfers on a bus A method and apparatus for ordering data transfers includes an identifier of a critical portion of data being received from a requesting agent along with a... |
| US-5,923,856 |
Control system for coping with bus extension in controlling a
communication apparatus A control system for a communication apparatus has capability of coping with bus extension. The control system includes a control section and a plurality of... |
| US-5,923,855 |
Multi-processor system and method for synchronizing among processors
with cache memory having reset state,... In a multi-processor system including a plurality of processing units each having a cache memory, the processing units each include a synchronization counter for... |
| US-5,923,854 |
Virtual internet protocol (IP) addressing In a telecommunications system containing a host computer and multiple real connections to the telecommunications network, an apparatus, method and system for... |
| US-5,923,853 |
Using different network addresses for different components of a
network-based presentation A presentation is divided into different components. For example, a multimedia presentation may have an audio component and a video component. Each component is... |
| US-5,923,852 |
Method and system for fast data transmissions in a processing system
utilizing interrupts A system and method for facilitates a fast transmission of packet information into the buffers without unnecessary delays, thereby increasing overall system... |
| US-5,923,851 |
Method and apparatus for interconnecting network devices in a networking
hub A system for interconnecting line cards attached to a networking hub is disclosed. The disclosed system operates by forming backplane networks between the line... |
| US-5,923,850 |
Historical asset information data storage schema A system for managing asset information pertaining to a network. A network information database may both provide a snapshot of the current state of the network... |
| US-5,923,849 |
Method of auditing communication traffic The present invention discloses a method for auditing and controlling overt and covert communication traffic in a communication system. The present invention... |
| US-5,923,848 |
System and method for resolving names in an electronic messaging
environment In an electronic mail system environment, a system and method for automatically checking recipients' names, providing message flags, providing custom forms, and... |
| US-5,923,847 |
Split-SMP computer system configured to operate in a protected mode
having repeater which inhibits transaction... A computer system includes multiple local buses to which processors and other devices may be connected. A repeater is coupled to each of the local buses.... |
| US-5,923,846 |
Method of uploading a message containing a file reference to a server
and downloading a file from the server... A system for posting and downloading messages and files from a bulletin board system is described. The system allows a user to retrieve a message from a bulletin... |
| US-5,923,845 |
Integrated electronic information system An electronic system using collectors, rosters, notifiers, and links provides a uniform system for communications, information management and human organization.... |
| US-5,923,844 |
Remote collaboration among host computer running host program and remote
computers each running application program The invention concerns using multiple computers to hold a conference. Under the invention, an application program can run on a single computer, yet remote... |
| US-5,923,843 |
Method and apparatus for overriding access security to a PC when a
password is lost A system for overriding access security in a computing device including a local security device and an input device. Access security is overridden when a medium... |
| US-5,923,842 |
Method and apparatus for simultaneously providing anonymous user login
for multiple users A method for allowing anonymous user login to a computer begins when an application request is received from a client. The next available anonymous user name is... |
| US-5,923,841 |
Computer system having security functions and a security method A computer system having security functions according to an exemplary embodiment of the present invention includes a keyboard for enabling a user to select a... |
| US-5,923,840 |
Method of reporting errors by a hardware element of a distributed
computer system An error message is generated by a hardware element of a distributed computer system, when an error is detected. The error message is then forwarded from the... |
| US-5,923,839 |
Data storage system, data transfer method, and data reconstruction method A data storage system is provided having a faster data transfer rate and reduced complexity though improved control of timing. The data storage system has a... |
| US-5,923,838 |
Microcomputer with built-in flash memory A microcomputer with a flash memory that solves a problem of software overload due to polling during writing or erasing of a flash memory, an interrupt caused by... |
| US-5,923,837 |
Method of accessing data using approximate data structures A method for constructing approximate data structures is disclosed in which the operations that define the data structure are relaxed. The operations are... |
| US-5,923,836 |
Testing integrated circuit designs on a computer simulation using
modified serialized scan patterns A method to test an integrated circuit design on a computer simulation loads a desired simulation test vector in parallel into a scan chain (30). The simulation... |
| US-5,923,835 |
Method for scan test of SRAM for microprocessors having full scan
capability A method for allowing a RAM array within an SRAM to be tested via scan ATPG is disclosed. A first clocked flip-flop has a data input latched high, a scan-in... |
| US-5,923,834 |
Machine dedicated monitor, predictor, and diagnostic server In one embodiment, a server electrically connected to an image processing machine provides local data access and includes a monitor component, an analysis and... |
| US-5,923,833 |
Restart and recovery of OMG-compliant transaction systems A method and system for implementing a Restart Service for the Object Transaction Service are described. The present invention provides a method and system which... |
| US-5,923,832 |
Method and apparatus for checkpointing in computer system A computer system monitors inter-process communications and performs a synchronous (global) checkpointing for processes that belong to a checkpoint group. The... |
| US-5,923,831 |
Method for coordinating membership with asymmetric safety in a
distributed system A method is disclosed for coordinating membership subject to an asymmetric safety condition from multiple processes in a distributed system. Each is callable by... |
| US-5,923,830 |
Non-interrupting power control for fault tolerant computer systems A non-intrusive power control for a fault tolerant computer system which uses redundant voting at the hardware clock level. The computer includes three or more... |
| US-5,923,829 |
Memory system, memory control system and image processing system A determining unit determines which area in an SDRAM is the area in which image data is stored. According to the determination of the determining unit, a control... |
| US-5,923,828 |
Image forming apparatus which forms an image based on bit map data An image forming apparatus which forms an image based on bit map data. A compressing circuit compresses the bit map data to generate compressed data by... |
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