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| Patent # | Description |
|---|---|
| US-6,104,259 |
Harmonic suppression circuit Disclosed herein is a harmonic suppression circuit having a first microstrip line and a second microstrip line each having the same characteristic impedance. One... |
| US-6,104,258 |
System and method for edge termination of parallel conductive planes in
an electrical interconnecting apparatus A system and method are presented for stabilizing the electrical impedance of an electrical interconnecting apparatus including a pair of parallel planar... |
| US-6,104,257 |
Crystal oscillator with eprom-controlled frequency trim An apparatus comprising a storage circuit, a load circuit and an oscillator circuit. The storage circuit may be configured to store a number of configuration... |
| US-6,104,256 |
Device with an oscillator circuit An oscillator circuit contains a switching circuit which periodically charges and discharges a capacitive node. The capacitive node is coupled to the input of... |
| US-6,104,255 |
Voltage controlled oscillator with a resonator common to a resonance
circuit and an oscillation circuit and a... A voltage controlled oscillation circuit includes a resonance circuit and an oscillation circuit. The oscillation circuit includes a capacitor, a variable... |
| US-6,104,254 |
VCO in CMOS technology having an operating frequency of 1 GHz and greater The present invention comprises a CMOS voltage controlled oscillator (VCO) circuit for operation at frequencies of 1 GHz and above. The circuit of the present... |
| US-6,104,253 |
Integrated circuits having cooperative ring oscillator clock circuits
therein to minimize clock skew Integrated circuits having cooperative ring oscillator clock circuits therein include a plurality of synchronous and asynchronous active devices on the substrate... |
| US-6,104,252 |
Circuit for automatic frequency control using a reciprocal direct
digital synthesis A circuit for automatic frequency control includes an oscillator and a digital synthesis device to which a first frequency of the oscillator is supplied as a... |
| US-6,104,251 |
Method and apparatus for providing transient suppression in a central
processor unit (CPU) phase locked loop... The present invention is directed to apparatus and methods for reducing transient signals in phase locked loop (PLL) circuits of central processing units. One... |
| US-6,104,250 |
Method and an apparatus for controlling an oscillator for generating a
linear frequency sweep by use of a... A method and an apparatus for controlling a radar oscillator for use in the traffic field, in particular for a car radar, for generating a linear frequency... |
| US-6,104,249 |
Highly linear transconductance circuit and filter using same An integrated circuit includes a transconductance circuit having a bias current generator coupled to a power supply. The bias current generator may include a... |
| US-6,104,248 |
Audio amplifier with tracking power supply utilizing inductive power
converters Disclosed is an audio amplifier with a tracking power supply that uses inductive power converters to provide positive and negative amplifier operating potentials... |
| US-6,104,247 |
Power amplifier for mobile communication system A power amplifier for a radio communication system is provided which includes a divider for equally dividing a received signal into two signals, an amplifier for... |
| US-6,104,246 |
Variable gain RF amplifier with switchable bias injection and feedback A RF integrated circuit including an amplifier having an input node and an output node; a switchable feedback path coupled between the output node and input... |
| US-6,104,245 |
Measuring amplifier An instrumentation amplifier for absolute voltage amplification having a balanced voltage inlet and a balanced voltage outlet. The voltage inlet is coupled to... |
| US-6,104,244 |
Amplifier having a rail-to-rail output stage A rail-to-rail output circuit synthesizes a constant product output characteristic by replicating the current through a pull-up transistor and utilizing a... |
| US-6,104,243 |
Integrated temperature-compensated amplifier circuit In a fully integrated logarithmic amplifier, an input current is fed via a diode, and in a reference current branch parallel thereto, a constant current flows... |
| US-6,104,242 |
Highly linear transconductor with passive feedback A high linearity transconductance stage is arranged with a loss cancellation method to remove the nonlinearity of a typical transconductance circuit. The loss... |
| US-6,104,241 |
High efficiency feed-forward RF power amplifier with predistoration
enchancement An RF power amplifier linearization architecture contains main and auxiliary path RF amplifiers. A distortion-inverting circuit extracts the distortion component... |
| US-6,104,240 |
Microwave circuit and method of manufacturing microwave circuit A microwave circuit having a coupler with two microstrip conductors on a front surface of a substrate, parallel to each other, and electromagnetically coupled to... |
| US-6,104,239 |
Method for correcting frequency-varying nonlinear errors and digital
correction circuit implementing same A method and system for correcting errors introduced by a non-linear amplifying device to an input signal inputted to the device. A Look-Up Table (LUT) stores... |
| US-6,104,238 |
FM demodulator including tuning of a filter and detector An FM demodulator circuit includes a filter (10) and a detector (14) for receiving a frequency modulated input signal and for providing a demodulated output... |
| US-6,104,237 |
Method for estimating phase in demodulator A signal from a local oscillator is separated by a 90.degree. phase sifter into an in-phase component and an orthogonal component. Each of the components is... |
| US-6,104,236 |
Apparatus and method for equalizing received network signals using a
transconductance controlled biquadratic... A network line equalizer includes a transconductance-controlled, tunable single zero high pass filter having a parasitic pole, and a single zero, single pole low... |
| US-6,104,235 |
Integrated circuit with trimmable passive components An integrated circuit having a passive circuit component that can be adjusted following the manufacturing process to provide a precise absolute value for... |
| US-6,104,234 |
Substrate voltage generation circuit An improved substrate voltage (VBB) generation circuit is disclosed. The circuit reduces variations in VBB (.DELTA.VBB) caused by variations (.DELTA.VCC) in a... |
| US-6,104,233 |
Substrate structure of semi-conductor device A p-well region (16) is formed in the main surface area of an n-type semiconductor substrate (11). A potential (V.sub.BB) which is lower than an externally input... |
| US-6,104,232 |
DC output level compensation circuit Disclosed is a circuit and method for compensating DC output level variations in a differential emitter-coupled logic circuit. The DC output level compensating... |
| US-6,104,231 |
Temperature compensation circuit for a hall effect element A temperature compensation circuit is provided for use in conjunction with a Hall effect element in which the temperature compensating resistors, or epitaxial... |
| US-6,104,230 |
Electronic inductor circuit using cascoded transistors An electronic inductor circuit comprises a pair of cascoded Darlington bipolar or MOSFET transistors, configured such that the impedance presented by the... |
| US-6,104,229 |
High voltage tolerable input buffer and method for operating same An input buffer for use in an integrated circuit having a V.sub.CC voltage supply and a V.sub.SS voltage supply. The input buffer includes a p-channel field... |
| US-6,104,228 |
Phase aligner system and method A system for aligning the phase of signals generated by a selectable standby clock source which has a predetermined frequency with the phase of signals generated... |
| US-6,104,227 |
RF mixer circuit and method of operation An RF mixer (10) provides signal gain in a transconductor block (12). A first transistor (36) is sized M times larger than a second transistor (18) to generate... |
| US-6,104,226 |
Circuit configuration for digitally setting analog parameters A circuit configuration for digitally setting analog parameters includes at least two analog multiplying devices each having a differential amplifier stage. The... |
| US-6,104,225 |
Semiconductor device using complementary clock and signal input state
detection circuit used for the same A semiconductor device for generating first and second internal clocks complementary with each other from an external clock and usable for both a system of a... |
| US-6,104,224 |
Delay circuit device having a reduced current consumption A delay circuit device having first and second delay circuits arrays so constructed that an output can be taken out from an arbitrary position of a signal... |
| US-6,104,223 |
Calibratable programmable phase shifter A programmable phase shifter includes a tapped delay line for successively delaying a periodic reference signal to produce a set of phase distributed tap... |
| US-6,104,222 |
Flexible phase locked loop system A stable and flexible phase locked loop system and method are disclosed. The system comprises a first phase frequency detector for detecting a difference between... |
| US-6,104,221 |
Power-up detection circuit of a semiconductor device Disclosed is a power-up detection circuit of a semiconductor device which generates an output signal enabling an activation of the semiconductor device to be... |
| US-6,104,220 |
Low power undervoltage detector with power down mode A single-ended power supply under-voltage level detection circuit included first and second stages of devices stacks coupled between a power supply signal and a... |
| US-6,104,219 |
Method and apparatus for generating 2/N mode bus clock signals A 2/N mode clock generator that generates bus clock signals through the use of bus clock enable signals selecting bus clock pulses that are in phase and out of... |
| US-6,104,218 |
High breakdown voltage push-pull circuit for semiconductor device The chip size of the high breakdown voltage push-pull output circuit for the semiconductor device can be reduced by use of only the low breakdown voltage... |
| US-6,104,217 |
Power on/off control circuit and method An apparatus for turning power to a device on and off is disclosed. The apparatus comprises a first signal input, a second signal input, a first charge output... |
| US-6,104,216 |
Differential amplifier having a reduced current dissipation A differential circuit used in an input interface of a memory device comprises a current mirror including a pair of P-channel transistors, a differential pair... |
| US-6,104,215 |
Signal detector with improved noise immunity A method for processing a signal transitioning from a high state to a low state is described, comprising the steps of detecting a transition of the signal from a... |
| US-6,104,214 |
Current mode logic circuit, source follower circuit, and flip flop
circuit A current mode logic circuit has a first and second NMOS transistors N1 and N2, an input terminal IN connected to both gates of the first and second NMOS... |
| US-6,104,213 |
Domino logic circuit having a clocked precharge A domino logic circuit having a clocked precharge is disclosed. The domino logic circuit includes a precharge transistor, a discharger transistor, several input... |
| US-6,104,212 |
Common domino circuit evaluation device A domino CMOS circuit has a number of domino gates, a common virtual ground node and a common evaluation NFET device. Each domino gate provides a PFET precharge... |
| US-6,104,211 |
System for preventing radiation failures in programmable logic devices A radiation-tolerant logic circuit includes three similarly configured SRAM-based PLDs. These PLDs work in parallel to provide identical logic functions. To... |
| US-6,104,210 |
Method for avoiding bus contention in a digital circuit In a digital circuit, a method for avoiding a bus contention condition which results from an overlap of active phases of multiple bus drivers. The method avoids... |
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