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| Patent # | Description |
|---|---|
| US-6,310,526 |
Double-throw miniature electromagnetic microwave (MEM) switches Miniature double-throw microwave switches are disclosed in this invention. In one embodiment a miniature double-throw electromagnetic switch for microstrip... |
| US-6,310,525 |
Dielectric laminated device and its manufacturing method By using a method for manufacturing a dielectric laminated device, an opening is formed on a first dielectric sheet, a strip line and an input and output line... |
| US-6,310,524 |
Edge reflection type longitudinally coupled saw resonator filter An edge reflection type longitudinally coupled SAW resonator filter includes a surface acoustic wave substrate having a first end surface and a second end... |
| US-6,310,523 |
Wide-range and low-power consumption voltage-controlled oscillator A wide-range and low power consumption voltage-controlled oscillator according to the invention includes a logic control circuit, a parallel series controllable... |
| US-6,310,522 |
Multiple-push oscillator The present invention proposes a multiple-push oscillator for providing a high-frequency signal. The multiple-push oscillator combines N (at least 3) fundamental... |
| US-6,310,521 |
Reference-free clock generation and data recovery PLL An apparatus comprising a first circuit, a second circuit, and a logic circuit. The first circuit may be configured to generate one or more first control signals... |
| US-6,310,520 |
High slew-rate operational amplifier architecture An amplifier architecture wherein a primary or main operational amplifier is combined with a secondary or auxiliary high power operational amplifier to maintain... |
| US-6,310,519 |
Method and apparatus for amplifier output biasing for improved overall
temperature stability An amplifier output is biased to optimize performance characteristics such as gain and output voltage. A temperature-independent current is subtracted from a... |
| US-6,310,518 |
Programmable gain preamplifier A programmable gain preamplifier is provided which has a low temperature drift and good dynamic range characteristics. The programmable gain preamplifier... |
| US-6,310,517 |
Microwave amplifier A microwave amplifier (10) of the present invention contains such an arrangement that both an inductor (12) and a resistor (13) are loaded in a parallel manner... |
| US-6,310,516 |
Attenuation compensation in amplification for a distribution network An amplifier intended for a signal distribution network, comprising filter means for giving a positive slope to the curve (N, L.sub.in, K) of the amplifier gain... |
| US-6,310,515 |
CMOS track and hold amplifier A switched Capacitor Track and Hold Amplifier having at least one signal input, at least one clock input and an output, comprising a sampling capacitor, a buffer... |
| US-6,310,514 |
Amplifier that indicates its degree of calibration An amplifier includes a first circuit and a second circuit. The first circuit, in a first mode of the amplifier, amplifies an input signal to produce a first... |
| US-6,310,513 |
Demodulator and demodulation method for demodulating quadrature modulation
signals A demodulator for demodulating a modulation signal (IF IN) which has been modulated by means of quadrature modulation includes a quasi-coherent detection... |
| US-6,310,512 |
Integrated self-adjustable continuous time band pass filter based upon Gm
cell with bipolar transistors An improved integrated self-adjustable continuous time band pass filter based upon a G.sub.m cell with G.sub.m compensation and bipolar transistors for use in a... |
| US-6,310,511 |
Generator scheme and circuit for overcoming resistive voltage drop on power
supply circuits on chips Apparatus is used to dynamically control the power output of generators of a generator system on a chip to load circuits on the chip. A power bus is directed... |
| US-6,310,510 |
Electronic circuit for producing a reference current independent of
temperature and supply voltage A current reference circuit comprises a positive temperature coefficient circuit and a negative temperature coefficient circuit, the temperature coefficients of... |
| US-6,310,509 |
Differential multiplexer with high bandwidth and reduced crosstalk A multiplexer includes a first input device that receives a first input signal and a first select signal. When the first select signal has a first state, the... |
| US-6,310,508 |
High frequency switch A high-frequency switch for blocking or transmitting a high frequency input signal. The switch includes a common-base transistor having an emitter, base, and... |
| US-6,310,507 |
Timing generation circuit for electro-optic sampling oscilloscope The present invention relates to an electro-optic sampling oscilloscope which carries out measurement of a measured signal using an optical pulse generated based... |
| US-6,310,506 |
Programmable setup/hold time delay network A system and method for providing a programmable delay to an input signal in a device requiring setup and hold times for input signal, such as a DRAM device. In... |
| US-6,310,505 |
Semiconductor integrated circuit, delay-locked loop having the same
circuit, self-synchronizing pipeline type... The problem of increase in jitter amounts against increase in delay amounts is solved by a circuit wherein a signal input terminal is connected through a first... |
| US-6,310,504 |
Data transmission circuit for compensating difference of speed A data transmission circuit is provided for compensating for a difference between data transmission speed occurring at start and end portions of a data line. The... |
| US-6,310,503 |
Delay circuit having a constant delay time The present invention discloses a delay circuit having a constant delay time. The delay circuit comprises an electric wire for transmitting a driving signal from... |
| US-6,310,502 |
Broadband phase shifting circuit having two phase shifter branches
connected in parallel A broadband phase-shifting circuit, in particular for an IQ modulator, has two phase-shifting branches connected in parallel, to the input of which is supplied... |
| US-6,310,501 |
Latch circuit for latching data at an edge of a clock signal A latch circuit comprises a delaying inverter circuit 1 for inverting a clock signal CLK with a predetermined delay, a precharge circuit for precharging a first... |
| US-6,310,500 |
Race removal or reduction in latches and loops using phase skew A method for resolving race conflicts in a loop circuit having a forward path and a feedback path includes enabling and disabling the feedback path in accordance... |
| US-6,310,499 |
Methods and apparatus for adjusting the deadtime between non-overlapping
clock signals A clock gater circuit which may be easily tuned for the purpose of adjusting the deadtime between non-overlapping clock signals. The clock gater circuit has... |
| US-6,310,498 |
Digital phase selection circuitry and method for reducing jitter In systems embodying the invention a voltage responsive circuit is used to generate a number of different clock signals having the same frequency, with each... |
| US-6,310,497 |
Power supply loss detector method and apparatus A power loss detector for generating a signal indicating the need to switch from a main power supply to an auxiliary power supply responsive to detecting that... |
| US-6,310,496 |
Signal transition accelerating driver circuit for promptly driving bus line
and bus driving system using the same A signal transition accelerating driver circuit for driving a signal line in the presence of an enable signal of a high level and to a potential level on the... |
| US-6,310,495 |
Clock wave noise reducer A clock circuit on an integrated circuit chip includes a driver having an output for deriving an output clock wave responsive to a clock wave of a clock wave... |
| US-6,310,494 |
Bus driver The invention relates to a bus driver having an inverter for driving a preferably clocked signal on a bus line. In the event of a capacitive coupling of the bus... |
| US-6,310,493 |
Semiconductor integrated circuit In a semiconductor integrated circuit, an input-output circuit includes a flip-flop circuit (a front stage of an output circuit) between an input circuit unit... |
| US-6,310,492 |
CMOS semiconductor integrated circuit In order to reduce power consumption, a power supply for a digital circuit portion is shut off, so that the output voltage of the power supply becomes the zero... |
| US-6,310,491 |
Sequential logic circuit with active and sleep modes A sequential logic circuit having active and sleep modes prevents stored information from being lost immediately after the transition from a sleep mode to an... |
| US-6,310,490 |
CMOS small signal switchable, impedence and voltage adjustable terminator
network and receiver integration A terminator circuit for connection to a network can be fabricated and used within CMOS-SOI (complementary metal oxide semiconductor--silicon on insulator) for... |
| US-6,310,489 |
Method to reduce wire-or glitch in high performance bus design to improve
bus performance A system and method of reducing wire-or glitch to improve bus speeds. In a system that supports wire-or functions, the rise time of the wave created by the... |
| US-6,310,488 |
Superconductive single flux quantum logic circuit In a superconductive single flux quantum logic circuit having two superconductive closed loops each comprising a Josephson junction and one or more inductors, a... |
| US-6,310,487 |
Semiconductor integrated circuit and testing method thereof The invention provides a semiconductor integrated circuit wherein a PMOS 111 having a high threshold voltage is installed between a VDD line 101 and a VDDV line... |
| US-6,310,486 |
Integrated test cell A semiconductor tester is disclosed that is adapted for testing semiconductor devices disposed on a handling apparatus. The semiconductor tester includes a... |
| US-6,310,485 |
Integrated circuit device having a burn-in mode for which entry into and
exit from can be controlled An integrated circuit structure and method provides a burn-in stress test mode that facilitates stress testing of an integrated circuit device in a burn-in oven.... |
| US-6,310,484 |
Semiconductor test interconnect with variable flexure contacts An interconnect for testing semiconductor components includes a substrate, and interconnect contacts on the substrate for electrically engaging terminal contacts... |
| US-6,310,483 |
Longitudinal type high frequency probe for narrow pitched electrodes A high-frequency probe according to the present invention comprises a probe chip that has an end part that is pressed to an electrode and is covered by a... |
| US-6,310,482 |
Capacitance gauge tracking apparatus used for exposure system for
manufacturing semiconductor device, method... A capacitance gauge tracking apparatus used for an exposure system for manufacturing a semiconductor device, a method for tracking a surface of the semiconductor... |
| US-6,310,481 |
Electronic battery tester A microprocessor couples to a voltage sensor through an analog to digital converter. The voltage sensor is adapted to be coupled across terminals of a battery. A... |
| US-6,310,480 |
Flow-through probe for NMR spectrometers There is disclosed an NMR probe including a body defining an internal chamber. This chamber is adapted for supporting a vacuum and the body is of a non-magnetic... |
| US-6,310,479 |
Magnetic resonance projection imaging of dynamic subjects An MRI system performs a cardiac gated scan of a moving coronary artery using preparatory pulse sequences and two-dimensional EPI (echo planar imaging) pulse... |
| US-6,310,478 |
Magnetic reasonance tomography apparatus and method in the form of a pulse
sequence for operating same In a method in the form of a pulse sequence for ultra-rapid nuclear magnetic resonance tomography and a magnetic resonance tomography apparatus operating... |
| US-6,310,477 |
MR imaging of lesions and detection of malignant tumors A 3D MR image is acquired before injection of a contrast agent and an enhanced 3D image is acquired after injection of the contrast agent. The two images are... |
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