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Patent # Description
US-6,311,279 Network node with internal battery backup
A method and apparatus for providing uninterrupted DC power for network nodes. The uninterrupted DC power is derived from modular, stackable uninterruptible...
US-6,311,278 Method and system for extracting application protocol characteristics
A method and computer program for automatically and continually extracting application protocols (i.e., defining a set of allowable or authorized actions) for...
US-6,311,277 Method and device for managing computer network
A method and a device for managing a computer network, especially a technique for ensuring the security of a network. A computer network system in which...
US-6,311,276 Secure system for remote management and wake-up commands
A security feature is added to the Wake On LAN packet protocol, and an extensible mechanism is provided allowing for other commands and options to be specified...
US-6,311,275 Method for providing single step log-on access to a differentiated computer network
A method for providing single step log-on access for a subscriber to a computer network. The computer network is differentiated into public and private areas....
US-6,311,274 Network alert handling system and method
A system and method for alert handling on a network. An alert setup message is received from a originator. The alert data structure includes an alert data...
US-6,311,273 Method and apparatus for enhancing computer system security
A security enhanced computer system arrangement includes a coprocessor and a multiprocessor logic controller inserted into the architecture of a conventional...
US-6,311,272 Biometric system and techniques suitable therefor
This invention discloses a biometric method eliciting a migrating biometric characteristic from individuals, the method including storing at least first and...
US-6,311,271 How to sign digital streams
A method of signing digital streams so that a receiver of the stream can authenticate and consume the stream at the same rate which the stream is being sent to...
US-6,311,270 Method and apparatus for securing communication utilizing a security processor
A method is provided for communicating digital content between a content provider and a data processing system which is under the control of a content consumer,...
US-6,311,269 Trusted services broker for web page fine-grained security labeling
Arbitrarily fine-grained limitation of access to information stored in a resource of a data processor network is provided in a manner compatible with existing...
US-6,311,268 Computer module device and method for television use
A computer module removably coupled to a console for outputting video data, includes a host interface controller coupled to receive a console configuration...
US-6,311,267 Just-in-time register renaming technique
A target register of an instruction is assigned a rename register in response to the instruction being issued. That is, the target register is renamed at issue...
US-6,311,266 Instruction look-ahead system and hardware
A method and system for executing instructions in a computer. Each instruction has a look-ahead code indicating the number of instructions after which may be...
US-6,311,265 Apparatuses and methods for programming parallel computers
A system provides an environment for parallel programming by providing a plurality of modular parallelizable operators stored in a computer readable memory. Each...
US-6,311,264 Digital signal processor with wait state register
A data processing device is used with peripheral devices having addressees and differing communication response periods. The data processing device includes a...
US-6,311,263 Data processing circuits and interfaces
An integrated circuit contains a microprocessor core, program memory and separate data storage, together with analogue and digital signal processing circuitry....
US-6,311,262 Apparatus for the hierarchical and distributed control of programmable modules in large-scale integrated systems
The apparatus has a multiplicity of control modules which are assigned to a multiplicity of processing modules for driving purposes. These separate control...
US-6,311,261 Apparatus and method for improving superscalar processors
The invention involves new microarchitecture apparatus and methods for superscalar microprocessors that support multi-instruction issue, decoupled dataflow...
US-6,311,260 Method for perfetching structured data
A method for prefetching structured data, and more particularly a mechanism for observing address references made by a processor, and learning from those...
US-6,311,259 System and method for reading unidirectionally recorded data bidirectionally
A system and method for allowing uni-directional data to be read in the reverse direction as well as the forward direction uses a data buffer to reverse the...
US-6,311,258 Data buffer apparatus and method for storing graphical data using data encoders and decoders
A data buffer apparatus stores first data objects containing a plurality of first data items and second data objects containing one or more second data items in...
US-6,311,257 Method and system for allocating memory for a command queue
A method and data storage system using the method, provides an efficiently approach for allocating a static amount of buffer space (e.g., records) among a number...
US-6,311,256 Command insertion and reordering at the same storage controller
The invention relates to a method and apparatus for reordering, at a disk drive controller, a received sequence of read and write commands. The reordering can be...
US-6,311,255 System and method for selectively restricting access to memory for bus attached unit IDs
A method and apparatus for selectively restricting access to a shared memory is presented in a computer network system having at least one bus capable of...
US-6,311,254 Multiple store miss handling in a cache memory memory system
A cache memory system including a cache memory suitable for coupling to a load/store unit of a CPU, a buffer unit comprised of a plurality of entries each...
US-6,311,253 Methods for caching cache tags
A method for storing information in a computer memory system includes maintaining an M.sup.th level storage system including an M.sup.th level data store for...
US-6,311,252 Method and apparatus for moving data between storage levels of a hierarchically arranged data storage system
A method of moving data between first, second, and third storage levels of a hierarchically arranged data storage system is described. The method includes the...
US-6,311,251 System for optimizing data storage in a RAID system
The intelligent data storage manager functions to optimize the data storage utilization in a RAID data storage subsystem that is equipped with a heterogeneous...
US-6,311,250 Computer memory controller with self refresh performed during memory back-up operation in case of power failure
A computer memory controller comprises a dynamic random access memory (DRAM) timing control section that provides, during memory back-up operation mode,...
US-6,311,249 Bus arbitration system having both round robin and daisy chain arbiters
A bus arbitration system includes a first priority grant signal determination part for primarily determining a priority grant signal among two groups including a...
US-6,311,248 Method and system for optimized data transfers in a mixed 64-bit/32-bit PCI environment
A method for optimizing the performance of a 64-bit PCI initiator when transferring a 64-bit data via a 64-bit PCI bus. The 64-bit PCI initiator receives a...
US-6,311,247 System for bridging a system bus with multiple PCI buses
The present invention is directed to a system for interfacing a system bus to a plurality of Peripheral Component Interconnect (PCI) buses. Specifically, the...
US-6,311,246 IC with dual function clock and device ID circuit
An integrated circuit in which the address and data inputs for a clock register to program a clock is also used for device ID and revision number. A shadow...
US-6,311,245 Method for time multiplexing a low-speed and a high-speed bus over shared signal lines of a physical bus
A method for combining a low-speed communications bus and a high-speed communications bus into a single multiplexed communications bus that supports both...
US-6,311,244 Priority allocation in a bus interconnected discrete and/or integrated digital multi-module system
A method and associated arrangement for use in priority allocation in a bus interconnected digital multi-module system are described. The modules are configured...
US-6,311,243 Reservation of transmission bandwidth and channel reservation for IEEE 1394 bus
A serial bus control apparatus is disclosed. The apparatus includes a device for providing a reservation control table for reserving a transmission bandwidth and...
US-6,311,242 Method and apparatus for supporting dynamic insertion and removal of PCI devices
Improved techniques for controlling buses of a computer system are disclosed such that peripheral devices (and/or their associated buses) can be connected or...
US-6,311,241 Method and configuration for transferring programs
A method for transferring programs to an electronic unit, in which the program to be transferred is stored on a plug-in device. The program is transferred to the...
US-6,311,240 Hardware assisted formatted data transfer system having a source storage controller and a formatting storage...
A system and method for hardware assisted formatted data transfer allows a formatting storage controller to read and record data on a formatted storage medium...
US-6,311,239 Architecture, circuitry and method for transmitting n-bit wide data over m-bit wide media
An architecture, circuitry and method for transmitting n-bit wide data over m-bit wide media that may comprise a first circuit configured to present a first...
US-6,311,238 Telecommunication switch with layer-specific processor capable of attaching atomic function message buffer to...
The present invention is a standardized host-to-switch application program interface (API) for performing call control processing, capable of being customized to...
US-6,311,237 System including single host buffer for transmit and receive data and reception buffer in interface device...
In the event that a host device does not have a transmitting FIFO and receiving FIFO independently, but shares one FIFO for both transmission and reception, and...
US-6,311,236 Magnetic disc control apparatus with parallel data transfer between disc control unit and encoder circuit
A data processing method of recording data on a recording medium mounted on an information recording apparatus. The data processing method includes the steps of...
US-6,311,235 UART support for address bit on seven bit frames
An asynchronous serial port provides increased serial throughput. In data frames comprising eight data bits, at least one bit may be disabled. The status and...
US-6,311,234 Direct memory access controller with split channel transfer capability and FIFO buffering
A microprocessor 1 is described which includes a direct memory access (DMA) circuitry 143. DMA 143 is interconnected with a program memory 23 and a data memory...
US-6,311,233 Communication system using a modem with a mode in which data receiving operation is shifted to control signal...
Even if a signal line is momentarily disconnected while data communication, such as image data communication, is being performed by using, for example, an ITU-T...
US-6,311,232 Method and apparatus for configuring storage devices
A method for configuring storage devices includes detecting an existing storage device configuration. The existence of a new storage device is detected, and the...
US-6,311,231 Method and system for coordinating data and voice communications via customer contract channel changing system...
This invention (The Customer Contact Channel Changer) enables the integration of different Customer Contact Channels such as live call centre ACD (Automatic Call...
US-6,311,230 System and method for cell switching with a peripheral component interconnect bus and decentralized,...
A port card employable in a cell switch including a host computer having a processor and a bus for interconnecting a plurality of port cards and a method of...
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