| Patent # | Description |
|---|---|
| US-6,311,329 |
Information providing apparatus and method, display controlling apparatus
and method, information providing... The invention provides an information providing apparatus and method by which the amount of data to be transmitted when data of a program table composed of... |
| US-6,311,328 |
Apparatus and method for enlarging/reducing a video picture size A picture processing apparatus for picture-in-picture applications where the number of pixels n in the horizontal direction of an original picture, the number of... |
| US-6,311,327 |
Method and apparatus for analyzing software in a language-independent
manner A software analysis system for capturing tags generated by tag statements in instrumented source code. The software analysis system includes a probe that... |
| US-6,311,326 |
Online debugging and tracing system and method The invention relates to a method and apparatus for debugging software running in a target machine. A debugging set-up script is created in a host machine which... |
| US-6,311,325 |
Method and apparatus for profiling processes in a data processing system
background of the invention A method and apparatus in a data processing system for profiling code for processes executing in a data processing system. Trace data is recorded in response to... |
| US-6,311,324 |
Software profiler which has the ability to display performance data on a
computer screen A C-language program performance tuning advisor that helps a systems analyst to improve the performance of an application. The tuning advisor identifies critical... |
| US-6,311,323 |
Computer programming language statement building and information tool An intelligent real time tool to assist a computer programmer during the writing and/or maintenance of a computer program. The tool generates assist windows that... |
| US-6,311,322 |
Program rewriting apparatus The normal program storing portion stores a normal program containing a control procedure of the program rewriting apparatus and a spare rewriting program. In a... |
| US-6,311,321 |
In-context launch wrapper (ICLW) module and method of automating
integration of device management applications... Embodiments of the present invention are directed to an In-Context Launch Wrapper (ICLW) module which provides a comprehensive generic interface for automating... |
| US-6,311,320 |
Alterable scripting tool and method A scripting tool for executing a script command having at least one parameter includes a display device, a processor, and a memory. The memory has stored therein... |
| US-6,311,319 |
Solving line-end shortening and corner rounding problems by using a simple
checking rule A methodolgy is described which allows a variety of optical proximity corrections to be added to a mask pattern at low cost and with a view to minimizing the... |
| US-6,311,318 |
Design for test area optimization algorithm A computer implemented circuit synthesis system includes a memory, an automatic test pattern generation (ATPG) algorithm, and processing circuitry. The memory is... |
| US-6,311,317 |
Pre-synthesis test point insertion A method of and system for inserting test points within an integrated circuit design. According to the present invention, test points are inserted early in the... |
| US-6,311,316 |
Designing integrated circuit gate arrays using programmable logic device
bitstreams Methods of designing integrated circuit gate arrays include the step of generating a netlist for a gate array integrated circuit having at least first logic and... |
| US-6,311,315 |
Semiconductor integrated circuit, design method and computer-readable
recording medium A first to fifth plugs provide interconnection between each transistor and a first metallic interconnection layer. A sixth to eighth plugs provide ... |
| US-6,311,314 |
System and method for evaluating the loading of a clock driver The present invention is generally directed to a system and method for evaluating the loading of a clock driver. Specifically, the present invention operates by... |
| US-6,311,313 |
X-Y grid tree clock distribution network with tunable tree and grid
networks An X-Y grid tree clock distribution network for distributing a clock signal across a VLSI chip. Tunable wiring tree networks are combined with an X-Y grid... |
| US-6,311,312 |
Method for modeling a conductive semiconductor substrate A method models conductive regions of a semiconductor substrate in conjunction with conductors in the interconnect structures above the semiconductor substrate.... |
| US-6,311,311 |
Multiple input shift register (MISR) signatures used on architected
registers to detect interim functional... A method for verifying all intermediate results of a set of architected registers at the end of an instruction stream, even if the final values do not depend on... |
| US-6,311,310 |
Method and apparatus for wiring integrated circuits with multiple power
buses based on performance A method and structure for designing a circuit, including identifying paths in the circuit not satisfying a preselected performance criteria, wherein identified... |
| US-6,311,309 |
Methods and apparatus for simulating a portion of a circuit design A method for simulating a portion of a circuit design is described. The circuit design includes a plurality of design files each corresponding to one of a... |
| US-6,311,308 |
Communication device and method for electronic price label systems A communication device and method for electronic price label (EPL) systems which use EPL components. The device includes a microcontroller, a first EPL circuit... |
| US-6,311,307 |
Digital current differential system A method of detecting faults on a power transmission line system includes simultaneously measuring phase current samples at each phase of each transmission... |
| US-6,311,306 |
System for error control by subdividing coded information units into
subsets reordering and interlacing the... The invention provides a method of interleaving information units in order to provide improved error control. A communication device codes the information units,... |
| US-6,311,305 |
Method and system for overriding error correction A method and system for overriding error correction capabilities of digital optical media is provided. The overriding of the error correction codes (ECC) is... |
| US-6,311,304 |
Method for encoding/decoding digital data by using shuffling in digital
video home system A method for error correction coding (ECC) by using shuffling of a digital data supplied as a bit stream in a digital-video home system. Three methods are... |
| US-6,311,303 |
Monitor port with selectable trace support An integrated circuit includes a monitor port, several circuit modules, and a selection circuit that selects which of the circuit modules drives internal signal... |
| US-6,311,302 |
Method and arrangement for hierarchical control of multiple test access
port control modules An arrangement controls an IC designed with multiple "TLM'ed core" circuits, such as multiple CPUs, with each core circuit including its own TAP controller and... |
| US-6,311,301 |
System for efficient utilization of multiple test systems A system for efficient utilization of multiple test systems may include an apparatus for testing an electronic circuit board, which comprises a number of... |
| US-6,311,300 |
Semiconductor testing apparatus for testing semiconductor device including
built in self test circuit A program power supply of a tester applies a power supply voltage to an IC to be tested. A pattern generator applies a clock signal and a command signal to a... |
| US-6,311,299 |
Data compression circuit and method for testing embedded memory devices A test circuit enables a memory tester to test for defective memory cells in a memory portion of an Embedded DRAM or other memory device having a relatively wide... |
| US-6,311,298 |
Mechanism to simplify built-in self test of a control store unit A control store unit having a control store address generator able to provide both the normal control store address generation functions, and the BIST/logout... |
| US-6,311,297 |
Apparatus and method for mapping an image to blocks to provide for robust
error recovery in a lossy... A method and apparatus for generating blocks of data for an image is described. An image is divided into a localized area. For each localized area, pixels are... |
| US-6,311,296 |
Bus management card for use in a system for bus monitoring A user-friendly, PCI bus-compliant plug-in management card is provided to evaluate a PCI bus in a host computer system for correct operation. The PCI management... |
| US-6,311,295 |
System and method for testing a clock signal The present invention utilizes a test circuit for receiving a reference clock signal and a sense clock signal and subsequently determining whether or not the... |
| US-6,311,294 |
Device and method for efficient bulk data retrieval using a universal
serial bus A USB device for communicating data from the device to a USB host is provided. The USB device may have an interrupt or isochronous endpoint for communicating... |
| US-6,311,293 |
Detecting of model errors through simplification of model via state
reachability analysis Efficient formal verification of a system model is obtained by performing a state reachability analysis of an unrestricted full system model that includes... |
| US-6,311,292 |
Circuit, architecture and method for analyzing the operation of a digital
processing system A dual access debugging architecture. This architecture allows the microprocessor to select between external debugging, supported via the physical system... |
| US-6,311,291 |
Remote modem control and diagnostic system and method A remote modem control and testing system includes a remote diagnostic unit (RDU) and a control computer linked by telephone lines and control modems. The RDU... |
| US-6,311,290 |
Methods of reliably allocating, de-allocating, re-allocating, and
reclaiming objects in a symmetrically blocked... Methods of reliably allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage... |
| US-6,311,289 |
Explicit state copy in a fault tolerant system using a remote write
operation The present invention provides a new method for performing re-integration of a CPU in a fault tolerant computer system. One of a "remote write" operation and a... |
| US-6,311,288 |
System and method for virtual circuit backup in a communication network A system and method for the detection of permanent virtual circuit failures in a communication network determines and classifies failures based upon physical or... |
| US-6,311,287 |
Variable frequency clock control for microprocessor-based computer systems A computer system including a microprocessor and a circuit to provide a clock signal for the microprocessor is described. The circuit is responsive to a control... |
| US-6,311,286 |
Symmetric multiprocessing system with unified environment and distributed
system functions The invention is directed to a memory controller for use with memory having varying timing characteristics. In particular, the timing characteristics of the... |
| US-6,311,285 |
Method and apparatus for source synchronous transfers at frequencies
including an odd fraction of a core frequency A method and apparatus for source synchronous transfers at frequencies including an odd fraction of a core frequency. A disclosed apparatus includes a signal... |
| US-6,311,284 |
Using an independent clock to coordinate access to registers by a
peripheral device and a host system The present invention coordinates access to at least one data register between a peripheral device and a host system. The peripheral device accesses the at least... |
| US-6,311,283 |
Need based synchronization of computer system time clock to reduce loading
on network server A method and apparatus are provided for performing need based synchronization of a time clock maintained by a computer system. A number of computer systems are... |
| US-6,311,282 |
Method and apparatus for computing device with status display A portable computing device (e.g. a notebook type computer) also includes communications features including a pager receiver and a radio frequency modem which... |
| US-6,311,281 |
Apparatus and method for changing processor clock ratio settings A processor has an external pin that can be asserted to lock in new clock ratio information dynamically. A state machine of the processor defines a stop grant... |
| US-6,311,280 |
Low-power memory system with incorporated vector processing A battery-powered portable radio device saves on the overall power consumed by the whole device by skipping unnecessary read, write, and refresh cycles of the... |