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| Patent # | Description |
|---|---|
| US-6,516,468 |
Cash transaction having antitheft mechanism A cash transaction machine having an antitheft mechanism capable of preventing the cash from being seized from a cash storage unit inside a housing through an... |
| US-6,516,467 |
System with enhanced display of digital video An entertainment system has a personal computer as the heart of the system with a large screen VGA quality monitor as the display of choice. The system has... |
| US-6,516,466 |
Method and apparatus for portable digital entertainment system An improved method and apparatus for portable digital entertainment system which melds direct microwave communications with digital technology to provide a... |
| US-6,516,465 |
Digital video receiver, a conditional access module and a method of
transmitting data therebetween A digital video receiver, a conditional access module and method of transmitting data therebetween, the digital video receiver having a multi line socket for... |
| US-6,516,464 |
Method and system for detecting audience response audio visual stimuli A system for testing audiovisual stimuli, such as television series, commercials, etc. from a complex of interactions between stimuli, consumers and... |
| US-6,516,463 |
Method for removing dependent store-load pair from critical path A method, implemented by a compiler, for removing a store-load dependency from a critical path utilizes a compare address operation to determine at run time... |
| US-6,516,462 |
Cache miss saving for speculation load operation Compiler optimization methods and systems for preventing delays associated with a speculative load operation on a data when the data is not in the data cache of... |
| US-6,516,461 |
Source code translating method, recording medium containing source code
translator program, and source code... A source code translating method includes the steps of representing a particular source code in the form of an abstract syntax tree without using nodes... |
| US-6,516,460 |
Debugging multiple related processes simultaneously Methods, systems and articles of manufacture comprising a computer usable medium having computer readable program code means therein are provided for debugging... |
| US-6,516,459 |
Integrated circuit design correction using fragment correspondence Layout correction is accomplished using a forward mapping technique. Forward mapping refers to mapping of fragments from a reticle to a target layout, while... |
| US-6,516,458 |
Layout structure for integrated circuit, method and system for generating
layout for CMOS circuit A layout structure and a method for generating a layout for an integrated circuit more efficiently to catch up with remarkable developments of fabrication... |
| US-6,516,457 |
Method and system of data processing for designing a semiconductor device A data processing system for designing a customized master slice data includes the steps of consecutively locating a cell base block based on the design data, a... |
| US-6,516,456 |
Method and apparatus for selectively viewing nets within a database editor
tool A method and apparatus for selectively viewing nets within a database editor tool. The present invention provides four primary features for selectively viewing... |
| US-6,516,455 |
Partitioning placement method using diagonal cutlines Some embodiments of the invention are placers that use diagonal lines in calculating the cost of potential placement configurations. For instance, some... |
| US-6,516,454 |
Method of estimating time delay A method of accurately estimating a time delay caused by a target cell where a target supply voltage is applied to the cell. Time delays, caused by a... |
| US-6,516,453 |
Method for timing analysis during automatic scheduling of operations in the
high-level synthesis of digital systems A design-timing-determination process for an electronic design automation system approximates the timing of a whole design quickly and on-the-fly. Such allows a... |
| US-6,516,452 |
Method and apparatus for verifying design data Disclosed is an apparatus for comparing CAD (computer aided design) design data comprising one or more components with a set of design rules generated relative... |
| US-6,516,451 |
Standards-integrated design software A computer process used to create a report to check a proposed project to insure conformity with existing standards. The software used utilizes a diagrammatic... |
| US-6,516,450 |
Variable design rule tool A variable design tool utilizes memory units to determine at which point a design rule fails. The variable design tool can provide a bit map indicating the... |
| US-6,516,449 |
Methodology to create integrated circuit designs by replication maintaining
isomorphic input output and fault... The present invention teaches a method for designing an integrated circuit. The design of the integrated circuit is replicated a number of times. The number of... |
| US-6,516,448 |
Fiber aligning structure The present invention relates to a device for passively aligning at least one substrate-carried optical fiber with at least one optical device. The substrate is... |
| US-6,516,447 |
Topological global routing for automated IC package interconnect An automated method and system is disclosed to determine an Integrated Circuit (IC) package interconnect routing using a mathematical topological solution. A... |
| US-6,516,446 |
Design system for flip chip semiconductor device A CAD system includes a storage device for storing information for the types and positions of cell blocks to be disposed in an internal circuit area, prohibition... |
| US-6,516,445 |
System and method for detecting point-of-deployment (POD) module failure A method is provided in a digital receiver interfacing with a point-of-deployment (POD) module and receiving a first data stream having a first predetermined... |
| US-6,516,444 |
Turbo-code decoder A turbo-code decoder includes a first reception signal memory, second reception signal memory, a priori memory, first adder, first selector, and second selector.... |
| US-6,516,443 |
Error detection convolution code and post processor for correcting dominant
error events of a trellis sequence... In a disk storage system for digital computers (e.g., optical or magnetic disk drives) a sampled amplitude read channel is disclosed comprising a convolutional... |
| US-6,516,442 |
Channel interface and protocols for cache coherency in a scalable symmetric
multiprocessor system A preferred embodiment of a symmetric multiprocessor system includes a switched fabric (switch matrix) for data transfers that provides multiple concurrent buses... |
| US-6,516,441 |
Device and method for transmitting subframe in mobile communication system A subframe data transmission device for a mobile communication system. A bit generator generates specific bits having a predetermined value. A bit inserter... |
| US-6,516,440 |
Printer and a control method for saving data from volatile to nonvolatile
memory in the printer A method for controlling the saving of information regarding printer operating conditions to its nonvolatile memory is provided. The method decreases the data... |
| US-6,516,439 |
Error control apparatus and method using cyclic code An error control apparatus includes: a deinterleaver for deinterleaving data of a predetermined number of bits coded by predetermined cyclic codes, which is to... |
| US-6,516,438 |
Concatenated coding system for satellite communications The present invention provides a method for custom coding uplink signals and downlink beams in a satellite communications system. The method includes the step of... |
| US-6,516,437 |
Turbo decoder control for use with a programmable interleaver, variable
block length, and multiple code rates A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a... |
| US-6,516,436 |
Error control coding for transmission equipment protection Error control coding is applied to data streams transmitted through transmission equipment such as a telecommunications switch having a distributed synchronous... |
| US-6,516,435 |
Code transmission scheme for communication system using error correcting
codes In a code transmission scheme for a communication system using error correcting codes, the transmitting side generates at least one transmitting side syndrome... |
| US-6,516,434 |
Application-specific integrated circuit (ASIC) for use in communication
facilities of a digital network The invention relates to an application-specific integrated circuit (ASIC) (1) for use in communication facilities of a digital network in which a data signal to... |
| US-6,516,433 |
Method for finding the root cause of the failure of a faulty chip A method for finding the root causes of the failure of a faulty chip. The faulty chip comprises at least one defect. First, a type-searching step for the defect... |
| US-6,516,432 |
AC scan diagnostic method Disclosed is an alternating current (AC) scan diagnostic system in which one or a plurality of scan chains are tested by serially propagating predetermined bit... |
| US-6,516,431 |
Semiconductor device A semiconductor device comprising a memory circuit, a switch for relieving the memory circuit of its failures, and a logic circuit to be tested, facilitates a... |
| US-6,516,430 |
Test circuit for semiconductor device with multiple memory circuits A semiconductor device having multiple memory circuits and one or more logic sections includes a single test circuit for testing all of the memory circuits. The... |
| US-6,516,429 |
Method and apparatus for run-time deconfiguration of a processor in a
symmetrical multi-processing system A method and apparatus in a multiprocessor data processing system for managing a plurality of processors. Monitoring for recoverable errors in a set of... |
| US-6,516,428 |
On-chip debug system An on-chip debug system includes a data band selector operable to transmit to an emulator the selected data bands generated by the selected components in an... |
| US-6,516,427 |
Network-based remote diagnostic facility The invention is utilized in the context of a peripheral device that is coupled to a network via a firewall which blocks unwanted incoming message traffic,... |
| US-6,516,426 |
Disc storage system having non-volatile write cache A disc storage system having a host computer interface adapted to coupled to a host computer, a disc storage medium having a disc surface and a spindle motor... |
| US-6,516,425 |
Raid rebuild using most vulnerable data redundancy scheme first A method of managing data in a hierarchical data storage system employing data redundancy schemes includes prioritizing a data rebuild based on a most vulnerable... |
| US-6,516,424 |
System for providing reliable and effective disaster relief When communication networks are damaged or communication is restricted due to the occurrence of a disaster, etc., information required for disaster relief is... |
| US-6,516,423 |
System and method for providing multiple queue redundancy in a distributed
computing system A method and system are disclosed for maintaining a central queue for sequentially processing data within a distributed processing system. The method and system... |
| US-6,516,422 |
Computer system including multiple clock sources and failover switching A system and method for providing redundant, synchronized clocks in a computer system. Upon a failure of a master clock signal, the system switches over to a... |
| US-6,516,421 |
Method and means for adjusting the timing of user-activity-dependent
changes of operational state of an apparatus Provided is a method and components of an apparatus for implementing a method for assisting with adjustment of the timing of user-inactivity-dependent changes of... |
| US-6,516,420 |
Data synchronizer using a parallel handshaking pipeline wherein validity
indicators generate and send... A data synchronizer transfers information across an asynchronous interface by using system domain and core domain logic on either side of the asynchronous... |
| US-6,516,419 |
Network synchronization method and non-break clock switching method in
extended bus connection system A method of simple network synchronization in a bus extension system with expanded capabilities wherein a plurality of independently-operable multimedia... |
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