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| Patent # | Description |
|---|---|
| US-6,523,178 |
Video transmission system In a video transmission system which transmits video data through an ATM network, the ATM network sets up fixed virtual connections between transmitters and a... |
| US-6,523,177 |
Cable television system with digital reverse path architecture A cable television system (100) includes forward and reverse paths. Reverse path circuitry within an optical node (400) of the system (100) receives reverse... |
| US-6,523,176 |
Reservation processing apparatus and method A reservation processing apparatus. A data receiving section receives broadcast data including mainview data and preview data. The preview data represents... |
| US-6,523,175 |
Methods and apparatus for identifying the source of a user selected signal
via an intermediate frequency probe A non-invasive or minimally invasive intermediate frequency (I.F.) probe is disclosed for use as part of a broadcast audience measurement system. The probe can... |
| US-6,523,174 |
Data processing method using sub-operation metadata to determine execution
sequencing prior to object loading A method of data processing in which a composite data processing operation, for execution by a data processing device having a memory, is assembled by a user as... |
| US-6,523,173 |
Method and apparatus for allocating registers during code compilation using
different spill strategies to... Register allocation during computer program code compilation is accomplished by determining a set of spill candidates, by evaluating a cost function for each... |
| US-6,523,172 |
Parser translator system and method A parser-translator technology allows a user to specify complex test and/or transformation statements in a high-level user language, to ensure that such test... |
| US-6,523,171 |
Enhanced source code translator from procedural programming language (PPL)
to an object oriented programming... A method for translating source code programs written in a procedural computer language in source code programs written in an Object Oriented language. The... |
| US-6,523,170 |
Technique for creating internet enabled resource files A technique for converting a resource file into object oriented source code and/or an object oriented class. A standard resource file is first converted into... |
| US-6,523,169 |
Method for testing system components of an object-oriented program A method for testing system components of an object-oriented program, wherein system components of an object-oriented program are tested such that nested... |
| US-6,523,168 |
Reduction of object creation during string concatenation and like
operations that utilize temporary data storage Reduction of object creation during string concatenation and like operations that utilize temporary data storage during translating a first computer program into... |
| US-6,523,167 |
Spreadsheet recalculation engine version stamp A recalculation engine version stamp is employed to determine whether a spreadsheet program file should be fully recalculated upon opening. When a spreadsheet... |
| US-6,523,166 |
Method and system for on-demand installation of software implementations A method and system for installing software implementations such as applications and COM classes as they are needed from an external source, such as a... |
| US-6,523,165 |
Alternating phase shift mask design conflict resolution Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close... |
| US-6,523,164 |
Method and apparatus for modifying flattened data of designed circuit
pattern Grouping is performed by classifying the data of features having same shapes and sizes in the same layer into the same group. In the grouping, a feature size... |
| US-6,523,163 |
Method for forming pattern data and method for writing a photomask with
additional patterns A method for writing a photomask with additional patterns for making a photomask having uniform pattern density is provided, wherein the method for writing a... |
| US-6,523,162 |
General purpose shape-based layout processing scheme for IC layout
modifications Layout processing can be applied to an integrated circuit (IC) layout using a shape-based system. A shape can be defined by a set of associated edges in a... |
| US-6,523,161 |
Method to optimize net lists using simultaneous placement and logic
optimization Method to optimize net lists used in the design and fabrication of integrated circuits by using simultaneous placement optimization, logic function optimization... |
| US-6,523,160 |
Method for dividing a terminal in automatic interconnect routing
processing, a computer program for... In a method for dividing a terminal into a plurality of terminal units in automatic interconnect routing processing in a semiconductor device, a terminal... |
| US-6,523,159 |
Method for adding decoupling capacitance during integrated circuit design A method and a related program storage product for adding decoupling capacitance in an integrated circuit during the floor planning stage of the integrated... |
| US-6,523,158 |
Wiring designing method for semiconductor integrated circuit In a wiring designing method for a semiconductor integrated circuit, a signal line (201) is wired. Adjacent signal lines (204, 205), in which output ends (204o,... |
| US-6,523,157 |
Method for designing integrated circuit device and database for design of
integrated circuit device In an integrated circuit device, when a net having many toggle counts exists in a circuit including blocks each having function modules, the circuit is changed... |
| US-6,523,156 |
Apparatus and methods for wire load independent logic synthesis and timing
closure with constant replacement... Disclosed is a method of generating an integrated circuit (IC) layout design. An initial layout netlist having a plurality of original cells is provided. A first... |
| US-6,523,155 |
Method for partitioning a netlist into multiple clock domains A method partitions a netlist into multiple clock domains. The number of clock domains is the number of primary input clocks plus one freerun domain. First, each... |
| US-6,523,154 |
Method for supply voltage drop analysis during placement phase of chip
design A method of analyzing supply voltage drops in a power grid for distributing power to an integrated circuit chip during design. The method initially comprises... |
| US-6,523,153 |
Method of design verification for integrated circuit system and method for
generating interface model for... In a design process of an integrated circuit system, an interface model is generated between a behavioral model described at a behavioral level and an RTL model... |
| US-6,523,152 |
Framework for rules checking utilizing resistor, nonresistor, node and
small node data structures An Electrical Rules Check (ERC) methodology ensures the quality of an electrical circuit through the creation of up to four different data structures,... |
| US-6,523,151 |
Method for verifying the design of a microprocessor A method for verifying an integrated circuit design includes generating verification coverage information by simulating the operation of the integrated circuit.... |
| US-6,523,150 |
Method of designing a voltage partitioned wirebond package Disclosed is a method of designing voltage partitions in a package for a chip, comprising: determining the current requirements of a chip voltage island... |
| US-6,523,149 |
Method and system to improve noise analysis performance of electrical
circuits A method, system and apparatus is provided to perform noise analysis of electrical circuits. The method and system partitions an original multi-port circuit to a... |
| US-6,523,148 |
Majority decision method for improved frame error rate in the digital
enhanced cordless telecommunications system A majority decision method for improved frame error rate in the digital enhanced cordless telecommunications (DECT) system. Specifically, one embodiment of the... |
| US-6,523,147 |
Method and apparatus for forward error correction coding for an AM in-band
on-channel digital audio... A method for digital audio broadcasting comprises the steps of providing a plurality of bits of digital information to be transmitted, interleaving the bits of... |
| US-6,523,146 |
Operation processing apparatus and operation processing method Shift register 5 stores data read from data memory 1 through data bus 3, and supplies a shift output to shift register 4. Shift register 4 stores operation... |
| US-6,523,145 |
Method and apparatus for testing a contents-addressable-memory-type
structure using a simultaneous write-thru mode A method and apparatus for testing a contents-addressable-memory type structure using a simultaneous write-thru mode in an array is provided. The circuit to be... |
| US-6,523,144 |
Intelligent binning for electrically repairable semiconductor chips and
method The present invention relates to a system and method for testing one or more semiconductor devices (e.g., packaged chips). Test equipment performs at least tests... |
| US-6,523,143 |
Memory testing apparatus Memory testing apparatus capable of reducing time necessary for transmitting an address signal from a pattern generator to a failure analysis memory. The memory... |
| US-6,523,142 |
Apparatus and method of performing in a disk drive commands issued from a
host system Disclosed herein is a system for controlling the process of performing a command in an HDD. The HDD comprises a register for holding the command control... |
| US-6,523,141 |
Method and apparatus for post-mortem kernel memory leak detection Methods and apparatus for detecting and reporting memory leaks associated with an operating system are disclosed. In accordance with one aspect of the present... |
| US-6,523,140 |
Computer system error recovery and fault isolation A method and implementing computer system is provided in which specific device identification information is acquired when a faulty condition is detected during... |
| US-6,523,139 |
System and method for fail safe process execution monitoring and output
control for critical systems Methods and systems for fail-safe process execution, monitoring and output control for critical systems operating on an open bus architecture with multiple,... |
| US-6,523,138 |
Input/output processing system An input/output processing system wherein even when one of channel processors has become faulty, channels so far controlled by the faulty channel processor can... |
| US-6,523,137 |
Method and system for remote testing of application program interfaces A system and method for remotely testing application program interface function calls within a software application under test which does not require a priori... |
| US-6,523,136 |
Semiconductor integrated circuit device with processor A multiplexer is provided for selecting Central Processing Unit (CPU) operation trace information sent from a debug support unit and an internal signal on an... |
| US-6,523,135 |
Built-in self-test circuit for a memory device A built-in self-test (BIST) circuit in a DRAM has a test mode controller including a mode counter for selecting based on the count thereof one of a plurality of... |
| US-6,523,134 |
Selective undo A "Selective Undo Function" for computer programs allows a user to select any single specific action that was previously recorded by the computer, and undo only... |
| US-6,523,133 |
Information processing apparatus that can hold internal information An information processing apparatus includes a volatile storage unit and a nonvolatile storage device for storing at least algorithm information for processings... |
| US-6,523,132 |
Flash EEprom system A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include... |
| US-6,523,131 |
Method for communicating a software-generated pulse waveform between two
servers in a network A method of monitoring a status condition of a first server with a second server in a server network, and also providing synchronization and messaging between... |
| US-6,523,130 |
Storage system having error detection and recovery A massively scalable architecture for providing a self-monitoring and self-correcting storage system that is capable of handling hundreds of millions of users... |
| US-6,523,129 |
Method of preventing computer malfunction during a change of power
consumption states via dynamic adjustment of... An improved method of preventing computer malfunction during a change of power consumption states is disclosed. The computer operates a microprocessor at a... |
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