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| Patent # | Description |
|---|---|
| US-6,901,053 |
Connectionless network express route A priority routing service is provided for a predetermined network user in a connectionless network such as an IP network. The network comprises a plurality of... |
| US-6,901,052 |
System and method for policing multiple data flows and multi-protocol data
flows A system and method for policing one or more flows of a data stream of packets associated with differing transmission protocols. The current capacity level for... |
| US-6,901,051 |
Server-based network performance metrics generation system and method A method and system of generating performance metrics for network traffic being transferred in and out of an intranet. Network traffic is non-intrusively... |
| US-6,901,050 |
Systems and methods for flow-based traffic shaping A system controls transmission of packet flows in a network device on a per-flow basis. The system includes multiple token buckets corresponding to the output... |
| US-6,901,049 |
Method and apparatus for supporting header suppression and multiple
microflows in a network A first packet processing node in a header suppression mode suppresses transmission of one or more packet headers. A second packet processing node receives the... |
| US-6,901,048 |
Link-level protection of traffic in a packet-switched network In a packet-switched network having a plurality of nodes interconnected by links, pre-defined protection paths provide protection of a selected plurality of... |
| US-6,901,047 |
Internally coupled input path redundancy A communications network. The network includes a plurality of network elements connected by links along which data flows between the network elements, and which... |
| US-6,901,046 |
Method and apparatus for scheduling and modulation and coding selection for
supporting quality of service in... The invention is a process and system for controlling selection of which MS is to receive the next packet data transmission on a forward channel and selection of... |
| US-6,901,045 |
Optical lens and method of producing the same, method of producing optical
lens array, focus error signal... An optical lens whose focal length is different on first and second planes perpendicular to each other is provided. The optical lens is configured such that a... |
| US-6,901,044 |
Optical information medium and its use An optical information medium (20) for erasable recording by means of a laser-light beam (10) is provided. A substrate (1) holds a stack (2) of layers with a... |
| US-6,901,043 |
Scratch-off material layer applied on optical recording media An optical recording medium having a scratch-off material layer includes a transparent substrate, a reflective layer formed on the transparent substrate, a... |
| US-6,901,042 |
Optical disc, having a certification pit for certifying that data recording
thereon is original An optical disc includes a processed area that has been processed by the irradiation of a YAG laser. Concave pits and convex pits having a length 3T-14T (T=0.133... |
| US-6,901,041 |
Method for managing defective area of optical recording medium A technology for managing a defective area of a rewritable optical recording medium is disclosed. This technology (1) returns information on a defective area to... |
| US-6,901,040 |
Kp and Ki lookup system and method A system and method for controlling operation of a motor system that addresses the design challenges for the small form factor optical disk system. The control... |
| US-6,901,039 |
Writable optical drive with dynamically variable linear velocity to prevent
buffer under-run The present invention relates to methods and apparatus for dynamically varying a linear velocity of an optical drive during a write operation to an optical disc... |
| US-6,901,038 |
Audio recording medium, methods of recording data on and reproducing data
from the recording medium, and... An audio recording medium, methods for recording data on and reproducing data from the audio recording medium, and recording and reproducing apparatuses... |
| US-6,901,037 |
Device for recording and/or reproducing an optical record carrier A device for recording and/or reproducing an optical record carrier (1), comprises an optical system for projecting a first, a second and a third optical beam at... |
| US-6,901,036 |
Method and apparatus for reproducing an optical signal An apparatus for reproducing information stored in an optical recording medium which comprises marks or pits which are arranged at a pitch less than... |
| US-6,901,035 |
Magneto-optical disc drive having insertion restricting and locking
portions A recording/reproducing apparatus includes a record medium cartridge holder having a main support portion with a cartridge carrying portion slidably arranged on... |
| US-6,901,034 |
Magneto-optical storage medium having data in uniform magnetized recording
direction A magnetooptic recording medium has at least a recording layer for recording data and a reproducing layer for reproducing the data recorded in the recording... |
| US-6,901,033 |
Electronic timepiece In an electronic timepiece 1 having a main plate 10, a drive circuit 36, a stepper motor 33, a train wheel, a dial plate, a power supply 15, and an insulation... |
| US-6,901,032 |
Timepiece from which sunrise and sunset time can be determined Disclosed is a timepiece from which a sunrise and sunset time along with the position of the sun can be determined. The sunrise time and the sunset time are... |
| US-6,901,031 |
Stroke information measuring instrument and stroke information measuring
method A stroke information measuring device according to the present invention comprises an imaging section 4 capturing image data of every predetermined time of a... |
| US-6,901,030 |
Tracking multiple targets in dense sensor fields The methods and systems relate to tracking targets, and more particularly to tracking multiple targets within a field of densely distributed sensor nodes using... |
| US-6,901,029 |
Towed low-frequency underwater detection system The invention relates to low-frequency underwater detection systems comprising a towed linear antenna (12, 13). It consists in producing the transducers of the... |
| US-6,901,028 |
Marine seismic survey apparatus with graphical user interface and real-time
quality control A graphical user interface (GUI) and control system for marine seismic data acquisition is described along with a method of real-time quality control of the... |
| US-6,901,027 |
Apparatus for processing data, memory bank used therefor, semiconductor
device, and method for reading out... In each of the memory cell arrays in the memory banks, a memory cell row corresponding to each of the word lines extending in a column direction of each of the... |
| US-6,901,026 |
Semiconductor integrated circuit equipment with asynchronous operation A semiconductor integrated circuit device includes a memory, /CE transition detector, address transition detector, /WE transition detector and controller. The... |
| US-6,901,025 |
Nonvolatile semiconductor memory device which can be programmed at high
transfer speed In a read operation, for example, 32 sense amplifiers read 32 pieces of data in a group. After that, the read data is outputted on a 4-bit unit basis. A memory... |
| US-6,901,024 |
Multi-port semiconductor memory device having reduced bitline voltage
offset and method for arranging memory... A multi-port semiconductor memory device includes a plurality of memory cells, each having a first bitline pair and a second bitline pair, and a plurality of... |
| US-6,901,023 |
Word line driver for negative voltage A word line driver includes multiple current paths for driving a word line of a memory device to a negative voltage and a positive voltage. When driving the word... |
| US-6,901,022 |
Proportional to temperature voltage generator A biasing circuit comprising a first circuit and a second circuit. The first circuit may be configured to generate a first bias signal and a second bias signal.... |
| US-6,901,021 |
Reference cells for TCCT based memory cells A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the... |
| US-6,901,020 |
Integrated charge sensing scheme for resistive memories An integrated charge sensing scheme for sensing the resistance of a resistive memory element is described. The current through a resistive memory cell is used to... |
| US-6,901,019 |
Sense amplifier with adaptive reference generation A digital memory system (30) includes a memory cell (52), a bit line (50), a transfer gate (60) a reference voltage generator (40), a sense amplifier (70) and a... |
| US-6,901,018 |
Method of generating initializing signal in semiconductor memory device A method for generating an initializing signal capable of preventing inner circuits installed in a semiconductor memory device from being initially unstably... |
| US-6,901,017 |
Semiconductor memory having hierarchical bit line structure A first amplifier amplifies voltage of a first local bit line connected to static memory cells. Precharging circuits for precharging a first global bit line... |
| US-6,901,016 |
Semiconductor memory device and electronic instrument using the same A semiconductor memory device has a first precharge transistor connecting a potential supply line to one end of a bit line when the bit line is precharged and a... |
| US-6,901,015 |
Semiconductor memory device A semiconductor memory device (1) comprises a normal RAM (2) and a redundancy RAM (3) provided independently from the normal RAM (2), serving as a redundancy... |
| US-6,901,014 |
Circuits and methods for screening for defective memory cells in
semiconductor memory devices Circuits and methods that enable screening for defective or weak memory cells in a semiconductor memory device. In one aspect, a semiconductor memory device... |
| US-6,901,013 |
Controller for delay locked loop circuits A method of monitoring the characteristics of a delay locked loop (DLL) in a memory device during a test mode is provided. The DLL generates an internal clock... |
| US-6,901,012 |
Semiconductor memory device having a power-on reset circuit A semiconductor device includes an internal power supply terminal for supplying an internal power supply voltage, an oscillator generating a clock pulse when the... |
| US-6,901,011 |
Self-repair method via ECC for nonvolatile memory devices, and relative
nonvolatile memory device The method for using a nonvolatile memory (1) having a plurality of cells (14), each of which stores a datum, is based upon the steps of performing an... |
| US-6,901,010 |
Erase method for a dual bit memory cell An erase methodology of flash memory cells in a multi-bit memory array with bits disposed in normal and complimentary locations. An erase verify of bits in the... |
| US-6,901,009 |
Booster circuit for non-volatile semiconductor memory device A detection circuit detects a rising time period between a power supply ON time or a reset time and a time when a boosted voltage reaches a standby voltage, and... |
| US-6,901,008 |
Flash memory with RDRAM interface A flash memory has been described that has an interface corresponding to a rambus dynamic random access memory (RDRAM). The memory samples commands and addresses... |
| US-6,901,007 |
Memory device with multi-level storage cells and apparatuses, systems and
methods including same The present invention comprises memory devices, apparatuses and systems including multiple bit per cell memory cells and methods for operating same. The multiple... |
| US-6,901,006 |
Semiconductor integrated circuit device including first, second and third
gates In a semiconductor integrated circuit device including a third gate, the present invention improves miniaturization and operation speed and reduces a defect... |
| US-6,901,005 |
Method and system reading magnetic memory Methods and apparatuses are disclosed for reducing the read time of a memory array. In one embodiment, the method includes sampling unknown data values from a... |
| US-6,901,004 |
High voltage switch circuitry The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable... |
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