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| Patent # | Description |
|---|---|
| US-6,901,556 |
Non-persistent stateful ad hoc checkbox selection A method for toggling checkbox status, implemented as a software program installed and operating on a computer comprising a computer processor coupled to... |
| US-6,901,555 |
Tree visualization system and method based upon a compressed half-plane
model of hyperbolic geometry A node-link structure is displayed within a display area, having a narrow rectangular shape with an edge along one side acting as a horizon of a hyperbolic space... |
| US-6,901,554 |
Method and apparatus in a data processing system for systematically
separating application graphical user... A method and apparatus in a data processing system for displaying a component or container. The container is displayed within a display using a first component.... |
| US-6,901,553 |
Apparatus and method for providing intrinsic access space to user in
hypertext space A specific access space for each user is selectively specified in the hypertext space having mutual link relation between one or more hypertexts provided by one... |
| US-6,901,552 |
System for storing data words in a RAM module The present invention describes a method of storing data words in a RAM module which is especially suited for applications that are critical in terms of safety... |
| US-6,901,551 |
Method and apparatus for protection of data utilizing CRC A dedicated hardware CRC computation engine is provided to assure the integrity of data transferred between the system memory and storage devices. The CRC... |
| US-6,901,550 |
Two-dimensional interleaving in a modem pool environment A method for interleaving data frames transmitted via a modem pool, each of the data frames including a plurality of codewords having a predefined level of error... |
| US-6,901,549 |
Method for altering a word stored in a write-once memory device The preferred embodiments described herein provide a method for altering a word stored in a write-once memory device. In one preferred embodiment, a write-once... |
| US-6,901,548 |
Coding apparatus, coding method and recording medium having coded program
recorded therein, and decoding... To carry out error correction coding and decoding according to a serially concatenated coded modulation system with a small circuit scale and high performance. A... |
| US-6,901,547 |
Retransmission procedure and apparatus for handshaking protocol Method and apparatus for minimizing a retransmission of messages when an error message is received during a communication handshaking procedure. A receiver, that... |
| US-6,901,546 |
Enhanced debug scheme for LBIST A device for fault testing in a microprocessor chip provides a LBIST circuit which has a first reference signature. A loading unit is further provided for... |
| US-6,901,545 |
Testing method for permanent electrical removal of an integrated circuit
output after packaging An apparatus and method of disconnecting or disabling an input/output terminal of an integrated circuit after packaging. Each input/output terminal of the... |
| US-6,901,544 |
Scan chain testing of integrated circuits with hard-cores The invention relates to an integrated circuit including a hard-core and a peripheral circuit. The hard-core and the peripheral circuit each include respective... |
| US-6,901,543 |
Utilizing slow ASIC logic BIST to preserve timing integrity across timing
domains A logic built-in self-test controller is disclosed. The invention, in its various aspects and embodiments, is a built-in self-test controller capable of... |
| US-6,901,542 |
Internal cache for on chip test data storage A method of testing a semiconductor device having a memory is disclosed. The method includes selecting a portion of the memory; testing the selected portion of... |
| US-6,901,541 |
Memory testing method and apparatus A method of testing memory devices includes issuing a command to a Flash memory device, simultaneously monitoring at least one data bit of each Flash memory... |
| US-6,901,540 |
TLB parity error recovery A microprocessor, data processing system, and method are disclosed for handling parity errors in an address translation facility such as a TLB. The... |
| US-6,901,539 |
ACPI name space validation A method and system for passively validating an advanced configuration and power interface (ACPI) name space are provided. A filter driver may be adapted for use... |
| US-6,901,538 |
Method, system, and recording medium of testing a 1394 interface card A method, system, and recording medium of testing 1394 interface card are disclosed in the present invention. A plurality of ports for the 1394 interface card to... |
| US-6,901,537 |
Method and apparatus for preventing the propagation of input/output errors
in a logical partitioned data... A method, apparatus, and computer instructions for halting input/output error propagation in the logically partitioned data processing system. All components... |
| US-6,901,536 |
Service quality monitoring system and method The present invention enables a software manufacturer to gain prompt, precise and comprehensive knowledge about how customers actually use a software program.... |
| US-6,901,535 |
Information processing apparatus, defect analysis program, and defect
analysis method The present invention has an display section for displaying an operation state of a program to a user in a time series manner based on program execution history... |
| US-6,901,534 |
Configuration proxy service for the extended firmware interface environment A method of abstracting information through object interfaces is described. The object interfaces are used to present platform device information in a pre-boot... |
| US-6,901,533 |
Reconstructing memory residents queues of an inactive processor When a processor becomes inactive, queues resident in the memory of that processor become inaccessible. Thus, in order to access those queues, an active... |
| US-6,901,532 |
System and method for recovering from radiation induced memory errors A system and method for recovering from radiation induced memory errors invalidates information stored in a cache memory, upon the detection of the memory error.... |
| US-6,901,531 |
Automatic system control failover A method, device, and system for automatic fail over of system controllers. A system controller includes a processor, a memory, and a plurality of I/O ... |
| US-6,901,530 |
Proactive repair process in the xDSL network (with a VDSL focus) A method for proactively managing a fault in a video and data network is provided. The method includes collecting network correlation data for the fault.... |
| US-6,901,529 |
Timer apparatus which can simultaneously control a plurality of timers A timer apparatus which can simultaneously control the operations of a plurality of timers without adjusting the operation of a counter of each timer in a... |
| US-6,901,528 |
Minimum latency propagation of variable pulse width signals across clock
domains with variable frequencies An apparatus comprising a counter circuit, a first register circuit, a second register circuit and an output circuit. The counter circuit may be configured to... |
| US-6,901,527 |
Synchronizing multiple time stamps distributed within a computer system
with main time of day register A method and computer system synchronize timing registers located throughout the computer system so that trace data from various sources in the system can be... |
| US-6,901,526 |
Digital bus synchronizer for generating read reset signal A digital bus includes a transmitter unit, a receiver unit, and a transmission medium to couple the transmitter unit to the receiver unit and to provide a path... |
| US-6,901,525 |
Method and apparatus for managing power consumption on a bus An information storage device (10) includes a cartridge (14) removably inserted into a cradle (13) that has a drive module (18) releasably coupled to an... |
| US-6,901,524 |
Processor having real-time power conservation and thermal management A real-time power conservation and thermal management apparatus and method for portable computers employs a monitor (40) to determine whether a CPU may rest... |
| US-6,901,523 |
Method and apparatus for information handling system sleep regulation An information handling system includes a microprocessor, a storage, a plurality of devices operatively connected to said microprocessor and a run voltage rail,... |
| US-6,901,522 |
System and method for reducing power consumption in multiprocessor system A method and apparatus for power management is disclosed. The invention reduces power consumption in multiprocessing systems by dynamically adjusting processor... |
| US-6,901,521 |
Dynamic hardware control for energy management systems using task
attributes A multiprocessor system (10) includes a plurality of processing modules, such as MPUs (12), DSPs (14), and coprocessors/DMA channels (16). Power management... |
| US-6,901,520 |
Power supply protection apparatus for computer system In a power supply protection circuit, a FET and a diode are connected to a power line so as to protect an inner circuit from an excessive voltage caused by a... |
| US-6,901,519 |
E-mail virus protection system and method A network is protected from e-mail viruses through the use of a sacrificial server. Any executable programs or other suspicious parts of incoming e-mail messages... |
| US-6,901,518 |
Method and system for establishing trust in downloaded proxy code A system consistent with the present invention enables a program in a distributed system to determine whether downloaded code is trustworthy before using the... |
| US-6,901,517 |
Hardware based security groups, firewall load sharing, and firewall
redundancy A secure telecommunications system includes an external network and an internal network on which traffic travels. The system includes a switch connected to the... |
| US-6,901,516 |
System and method for ciphering data A system for ciphering data for transmission by a communication device is provided. The system includes a memory device having a memory buffer a first access... |
| US-6,901,515 |
Code generating method and unit thereof, code detecting method and unit
thereof, and watermark embedding unit... Residue calculating sections respectively obtain residues which take a plurality of integers as modulus, with respect to a user ID. The plurality of integers are... |
| US-6,901,514 |
Secure oblivious watermarking using key-dependent mapping functions A method for embedding a watermark into content is disclosed. The content contains content samples. The method including the steps of: receiving the content,... |
| US-6,901,513 |
Process for generating a digital signature and process for checking the
signature A method for generating a digital signature s of a message m using a secret key including at least two large prime numbers p, q is provided. It is provided that... |
| US-6,901,512 |
Centralized cryptographic key administration scheme for enabling secure
context-free application operation In scalable multi-node systems, applications that interact with remote users often use sessions that involve multiple messages. Unless the application instance... |
| US-6,901,511 |
Portable terminals, servers, systems, and their program recording mediums Data containing important information are stored in DB cards separable from terminals. The terminals and mediums are placed in corresponding relationship.... |
| US-6,901,510 |
Method and apparatus for distributing and updating group controllers over a
wide area network using a tree... Apparatus and computer-readable media are disclosed for establishing secure multicast communication among multiple multicast proxy service nodes of domains of a... |
| US-6,901,509 |
Apparatus and method for demonstrating and confirming the status of a
digital certificates and other data Methods and apparatuses for providing cryptographic assurance based on ranges as to whether a particular data item is on a list. According to one ... |
| US-6,901,508 |
Method for expanding address for Internet protocol version 4 in Internet
edge router In the method for expanding an address for an Internet protocol in an Internet edge router and the record medium capable of being read through a computer having... |
| US-6,901,507 |
Context scheduling A programmable processing system that executes multiple instruction contexts includes an instruction memory for storing instructions that are executed by the... |
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