Searching:
Search by keyword, patent number, inventor, assignee, city or state:
| Patent # | Description |
|---|---|
| US-7,512,790 |
Method, system and article of manufacture for management of co-requisite
files in a data processing system... Files, such as HTML files, are managed by performing a permitted command or action initiated on a current file on all its co-requisite files as identified in an... |
| US-7,512,789 |
Mailing list server and mail transmission method thereof A mailing list server sends mail encrypted by an encryption method compatible with the mail user agent device likely to receive the mail. A mailing list server... |
| US-7,512,788 |
Method and apparatus for anonymous group messaging in a distributed
messaging system A group messaging system enabling anonymous collective communications in a group which is locally defined in association with a group owner's messaging account,... |
| US-7,512,787 |
Receive IPSEC in-line processing of mutable fields for AH algorithm The invention relates to a network interface system for interfacing a host system with a network. The network interface system includes a bus interface system, a... |
| US-7,512,786 |
Client-side boot domains and boot rules Each software component loaded for a verified operating system on a client computer must satisfy a set of boot rules for a boot certificate. A verified operating... |
| US-7,512,785 |
Revocation distribution A server registering a first party as a party relying upon a second party's certificate, revoking the second party's certificate after registering the first... |
| US-7,512,784 |
Distributed subscriber management system A distributed subscriber management system and method that controls access to a network preventing unauthorized traffic through the access network and providing... |
| US-7,512,783 |
Provision of security services for an ad-hoc network A method and apparatus provide security services in an ad-hoc network. In order to provide security services, a set of user identities is transmitted from a... |
| US-7,512,782 |
Method and system for using a web service license A method and system are provided such that a universal license may be used for authentication and authorization purposes and may include one or more ... |
| US-7,512,781 |
Firewall with stateful inspection A network security device for controlling the flow of packets into and out of an internal network , includes first and second network cards and a stateful... |
| US-7,512,780 |
Packet-parallel high performance cryptography systems and methods A cryptographic system (500) includes cryptographic sub-units (510) and associated input buffers (520) connected to a scheduler (530) and a reassembler (540).... |
| US-7,512,779 |
Apparatus, and associated method, for communicating signaling data in
secure form in a signaling network Apparatus, and an associated method, for communicating a signaling message, such as a message signaling unit, in secure form, even upon a communication path of... |
| US-7,512,778 |
Method for sharing host processor for non-operating system uses by
generating a false remove signal A method for using an operating system device for non-operating system uses. A false event signal is generated to indicate that a device should be shut down.... |
| US-7,512,777 |
Method and system for maintaining system management BIOS A method and system for maintaining a System Management BIOS (SMBIOS) in a computer system is provided. According to the proposed method and system, the BIOS of... |
| US-7,512,776 |
Optimized control plane signalling for a high availability network device
in a communications network A method for resetting a component of an off-card assembly in a redundant system, the redundant system having first and second control plane cards coupled to the... |
| US-7,512,775 |
Method for initializing and actuating a peripheral and device for
performing the method A method for initializing and actuating a peripheral by a mainframe with initialization and actuation codes of the periphery stored in a memory comprises the... |
| US-7,512,774 |
Method and system for collecting processor information Information regarding processors present on computer systems is collected. A hyper-threading processor class definition is established. A hyper-threading... |
| US-7,512,773 |
Context switching using halt sequencing protocol A halt sequencing protocol permits a context switch to occur in a processing pipeline even before all units of the processing pipeline are idle. The context... |
| US-7,512,772 |
Soft error handling in microprocessors A method for low cost handling of soft error in a microprocessor system is described, which includes detecting a soft error, indicating a register having soft... |
| US-7,512,771 |
Mapping circuitry and method comprising first and second candidate output
value producing units, an in-range... Mapping circuitry (40) comprises a first candidate output value producing unit (42) which produces a first candidate output value (Cl) that differs by a first... |
| US-7,512,770 |
Buffering apparatus and buffering method using ring buffer A read unit in a buffering apparatus writes data in a memory apparatus used as a ring buffer. A determination unit determines whether data is consecutively... |
| US-7,512,769 |
Process migration Migrating a process between separate logical address spaces involves saving information on a state of a process running in a first logical address space in... |
| US-7,512,768 |
Dynamically sharing a stack between different code segments In one embodiment, the present invention includes a method for receiving a request from a caller code portion of a first color to color at least a portion of a... |
| US-7,512,767 |
Data compression method for supporting virtual memory management in a
demand paging system A virtual memory management unit (306) includes a redundancy insertion module (307) which is used for inserting redundancy into an encoded data stream to be... |
| US-7,512,766 |
Controlling preemptive work balancing in data storage A storage network control apparatus is operable to present virtualized storage to a host system and includes a monitoring component, an analysis component, a... |
| US-7,512,765 |
System and method for auditing memory According to one embodiment of the invention, a method of auditing memory in a system comprises receiving a request for memory from an application and populating... |
| US-7,512,764 |
Method for allocating a memory of a de-interleaving unit A method is proposed for utilizing a memory of a de-interleaving unit comprising the steps of determining a size of the memory according to a maximal symbol... |
| US-7,512,763 |
Transparent SDRAM in an embedded environment A transparent memory array has a processor and a plurality of memory banks, each memory bank being directly connected to the processor. The memory array has... |
| US-7,512,762 |
System, method and storage medium for a memory subsystem with positional
read data latency A memory subsystem with positional read data latency that includes a cascaded interconnect system with one or more memory modules, a memory controller and one or... |
| US-7,512,761 |
Programmable processor and methods thereof having memory access locking A programmable processor and methods thereof are provided. The example programmable processor may include a memory lock signal generator outputting a memory lock... |
| US-7,512,760 |
Memory control unit and memory system A memory control unit includes fuses that are selectively blown to set a manufacturer's identification code (ID), and a further fuse that is selectively blown to... |
| US-7,512,759 |
Memory device A memory device includes a memory area directly inaccessible from an electronic device; a secure control section that manages access to this memory area; and a... |
| US-7,512,758 |
System and method for providing backup service continuity using a virtual
backup service path Provided are a system and method for using a plurality of virtual backup service paths to dynamically switch between storage devices based on a plurality of... |
| US-7,512,757 |
Computer system and control method for the computer system A computer system including a first storage system connected to a first host computer, a second storage system connected to a second host computer and a third... |
| US-7,512,756 |
Performance improvement for block span replication The portion of a source block storage resource to be replicated, and the corresponding portion of the block storage resource being written to, are each divided... |
| US-7,512,755 |
Computer system storing data on multiple storage systems During the normal operation state of a computer system 1000, the data stored in a primary storage system 200P is copied to an intermediate storage system 200I... |
| US-7,512,754 |
System and method for optimizing storage utilization In a storage area network, the storage pool is the principal component that determines the storage quality of service in the network. The proposed system's goal... |
| US-7,512,753 |
Disk array control apparatus and method A disk array control apparatus determines-whether or not a I/O process request from a host computer is causing a cache hit at a disk cache memory. The apparatus... |
| US-7,512,752 |
Systems, methods, and apparatus for pixel fetch request interface Presented herein are system(s) and apparatus for a memory access unit for accessing data for a module. The memory access unit comprises an output port for... |
| US-7,512,751 |
Method and apparatus for adjusting timing signal between media controller
and storage media A storage system controller (302) includes a plurality of media controllers (301), a local microprocessor (306), and a host interface logic (310), operably... |
| US-7,512,750 |
Processor and memory controller capable of use in computing system that
employs compressed cache lines' worth... A memory controller is described that comprises a compression map cache. The compression map cache is to store information that identifies a cache line's worth... |
| US-7,512,749 |
Safe software revision for embedded systems The present invention, in one embodiment includes identifying a first partition of an embedded program memory, reading a description associated with the first... |
| US-7,512,748 |
Managing lock rankings Methods of monitoring a computer system. The methods may comprise the steps of calculating a first checksum of a data location and receiving a request from an... |
| US-7,512,747 |
Method and apparatus for efficiently supporting multiple one-time table
access operations in a hierarchical... An embodiment of the present invention provides a computer system including a first memory and a second memory, where the first memory is substantially faster... |
| US-7,512,746 |
Storage system with designated CPU cores processing transactions across
storage nodes A storage system comprises a plurality of storage nodes and a controller coupling unit interconnecting controllers within the storage nodes. A memory in the... |
| US-7,512,745 |
Method for garbage collection in heterogeneous multiprocessor systems Garbage collection in heterogeneous multiprocessor systems is provided. In some illustrative embodiments, garbage collection operations are distributed across a... |
| US-7,512,744 |
Technique for enabling multiple virtual filers on a single filer to
participate in multiple address spaces with... A method for enabling a server configured with a plurality of virtual servers to participate in a plurality of private network address spaces and service... |
| US-7,512,743 |
Using shared memory with an execute-in-place processor and a co-processor The claimed subject matter provides systems and/or methods that facilitate sharing of a memory, having a single channel of access, between two or more... |
| US-7,512,742 |
Data processing system, cache system and method for precisely forming an
invalid coherency state indicating a... A cache coherent data processing system includes at least first and second coherency domains. In a first cache memory within the first coherency domain of the... |
| US-7,512,741 |
Two-hop source snoop based messaging protocol A messaging protocol that facilitates a distributed cache coherency conflict resolution in a multi-node system that resolves conflicts at a home node. The... |
Copyright 2008−2012 Patents.com
