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| Patent # | Description |
|---|---|
| US-7,548,469 |
Circuit and method of generating a boosted voltage in a semiconductor
memory device A circuit generates a boosted voltage in a semiconductor memory device, where the semiconductor memory device includes a memory cell array having a plurality of... |
| US-7,548,468 |
Semiconductor memory and operation method for same A bit line resetting signal is supplied to the gate of an nMOS transistor (or a precharge circuit) which connects a bit line with a precharge voltage line. The... |
| US-7,548,467 |
Bias voltage generator and method generating bias voltage for
semiconductor memory device There are provided a bias voltage generator, a semiconductor memory device having the bias voltage generator, and a method for generating the bias voltage. The... |
| US-7,548,466 |
Flash memory device and voltage generating circuit for the same A flash memory device includes a memory cell array including a plurality of memory cells. The flash memory device also includes a voltage generating circuit... |
| US-7,548,465 |
Low current consumption semiconductor memory device A semiconductor memory device that includes an input buffer being inputted a write data from outside to buffer the write data and a control circuit putting the... |
| US-7,548,464 |
Method for setting programming start bias for flash memory device and
programming method using the same A method for setting a programming start bias for a flash memory device to perform a programming operation is provided. First, the method performs ... |
| US-7,548,463 |
Nonvolatile semiconductor memory device and method of operating the same
which stably perform erase operation A nonvolatile semiconductor memory device includes a memory array and an X-decode section. The memory array includes a plurality of nonvolatile memory cells... |
| US-7,548,462 |
Double programming methods of a multi-level-cell nonvolatile memory A method for double programming of multi-level-cell (MLC) programming in a multi-bit-cell (MBC) of a charge trapping memory that includes a plurality of charge... |
| US-7,548,461 |
Soft errors handling in EEPROM devices Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a... |
| US-7,548,460 |
Floating-gate semiconductor structures Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a... |
| US-7,548,459 |
Method, apparatus, and system providing adjustable memory page
configuration A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or... |
| US-7,548,458 |
Methods of biasing a multi-level-cell memory Methods are described for double-side-bias of multi-level-cell memory devices comprising a NAND array that comprises a plurality of charge trapping memory cells.... |
| US-7,548,457 |
Multi-bit nonvolatile memory device and related programming method In a method of programming a nonvolatile memory device including a plurality of n-valued nonvolatile memory cells arranged in a matrix, wherein n is a natural... |
| US-7,548,456 |
Combo memory cell A combo memory cell having a SRAM cell and a mask-ROM code programmer. The SRAM cell comprises first and second inverters. The first inverter comprises a first... |
| US-7,548,455 |
Multi-valued logic/memory cells and methods thereof A memory cell and method for making a memory cell in accordance with embodiments of the present invention includes two or more tunnel diodes, a loading system,... |
| US-7,548,454 |
Memory array with readout isolation Methods and apparatus for measuring the bit state of a particular element in an array of passive nonlinear elements that are insensitive to loading effects from... |
| US-7,548,453 |
Memory array with readout isolation Methods and apparatus for providing an array of passive nonlinear elements having an interface circuit that isolates the array from loading effects from external... |
| US-7,548,452 |
MRAM read bit with askew fixed layer A new read scheme is provided for an MRAM bit having a reference layer (fixed) and a storage layer (free) sandwiching a nonmagnetic spacer layer. The reference... |
| US-7,548,451 |
Phase change random access memory Provided is a phase change random access (PRAM) memory. The PRAM may include a memory cell array having a plurality of phase change memory cells, and a data read... |
| US-7,548,450 |
Magnetic memory device, method for writing magnetic memory device and
method for reading magnetic memory device The magnetic memory device comprises: a memory cell including two magnetoresistive effect elements serially connected to each other, and a select transistor... |
| US-7,548,449 |
Magnetic memory device and methods thereof A magnetic memory device and methods thereof are provided. The example magnetic memory device may include a transistor disposed within a given unit cell region... |
| US-7,548,448 |
Integrated circuit having a switch A reprogrammable switch includes a first phase-change element, a first reference element, and a second reference element. The switch includes a sense amplifier... |
| US-7,548,447 |
Semiconductor memory device and methods thereof A semiconductor memory device and methods thereof. The example semiconductor memory device may include a semiconductor substrate, a first source line and a... |
| US-7,548,446 |
Phase change memory device and associated wordline driving circuit A semiconductor memory device includes a plurality of wordline driving circuits adapted to control the voltage level of a sub-wordline in response to a logic... |
| US-7,548,445 |
Over-driven access method and device for ferroelectric memory An over-driven access method and device for ferroelectric memory. When accessing the data stored in a ferroelectric memory, the invention further provides an... |
| US-7,548,444 |
Memory module and memory device In a memory module including a plurality of DRAM chips which transmit/receive a system data signal with a predetermined data width and at a transfer rate and... |
| US-7,548,443 |
Three-phase PWM-signal generating apparatus An apparatus for generating a three-phase pulse-width-modulation signal for a three-phase voltage inverter employing a semiconductor switching element includes a... |
| US-7,548,442 |
Power converter with coupled inductor A power converter has simple coupled inductor circuit process the power and drive the semiconductor switch perfectly to reduce the power loss and eliminate the... |
| US-7,548,441 |
Universal AC adapter A method and apparatus for adaptively configuring an array of voltage transformation modules is disclosed. The aggregate voltage transformation ratio of the... |
| US-7,548,440 |
Power and information signal transfer using micro-transformers A power converter provides power across an isolation barrier, such as through the use of coils. A coil driver has transistors connected in a positive feedback... |
| US-7,548,439 |
Electric power converter for reducing generated high frequency components By reduction in loss and noise of a three-phase reactor on the AC side of an electric power converter, compactness and reduction in weight of the reactor are... |
| US-7,548,438 |
System and method for input current shaping in a power converter A power converter delivers electrical power from an electrical power source to a load according to a plurality of operation modes, where at least one of the... |
| US-7,548,437 |
Switching mode power supply A switching mode power supply (SMPS) is presented to compensate for variations of maximum output power caused by variations of input power. The output power... |
| US-7,548,436 |
Driving circuit and a power converter incorporating the same A power converter includes: a transformer controlled by a main switch to receive an input power according to a driving signal; a switching circuit outputting a... |
| US-7,548,435 |
Zero-voltage-switching DC-DC converters with synchronous rectifiers A DC-DC converter includes an inductor, a synchronous rectifier (SR) connected to the inductor, and an active switch connected to the inductor and the SR. An... |
| US-7,548,434 |
Distributor connection module for telecommunication and data technology The invention relates to a distribution box connection module (1) for telecommunications and data technology, comprising a housing in which externally accessible... |
| US-7,548,433 |
Apparatus and method for setting adequate drive strength based upon DC
trace resistance An information handing system having apparatus for setting adequate drive strength based upon direct current (DC) trace resistance uses a resistance detection... |
| US-7,548,432 |
Embedded capacitor structure An embedded capacitor structure comprising a main body; at least one embedded capacitor, having a first electrode, a dielectric layer, and a second electrode,... |
| US-7,548,431 |
Optically connectable circuit board with optical component(s) mounted
thereon An optically connectable circuit board and optical components mounted thereon. At least one component includes optical transceivers and provides an optical... |
| US-7,548,430 |
Buildup dielectric and metallization process and semiconductor package A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the... |
| US-7,548,429 |
Battery storage system The invention includes a storage rack for storing an array of battery cells in an uninterrupted power source (UPS). The rack at least meets the seismic testing... |
| US-7,548,428 |
Computer device heat dissipation system A computer device heat dissipation system comprising a heat exchanger having a plurality of fins connected to a heat pipe, at least one of the plurality of fins... |
| US-7,548,427 |
Apparatus and docking station for cooling of computing devices An apparatus with some embodiments is described having cooling capabilities for a computing device. In some embodiments, the apparatus may include a... |
| US-7,548,426 |
Heat dissipation device with heat pipes A heat dissipation device includes a base (14) for absorbing heat from an electronic device and a plurality of fins (20) arranged on the base. A heat pipe (32)... |
| US-7,548,425 |
Heat-Receiving apparatus and electronic equipment A heat-receiving plate of a pump has a heat-receiving surface and a guide. The heat-receiving surface is thermally connected to a heat-generating body. The guide... |
| US-7,548,424 |
Distributed transmit/receive integrated microwave module chip level
cooling system A radar transmit and receive integrated microwave module with conductively cooled condenser side rails and one or more vacuum brazed fluid distribution manifold... |
| US-7,548,423 |
Heat dissipating device A heat dissipating device includes a heat sink, and a fan. The heat sink includes an end plane, and an engaging portion is defined in a middle of the end plane.... |
| US-7,548,422 |
Socket having fan A socket for a semiconductor package comprises an insulating base containing a plurality of contacts, a floating board received in the insulating base, a... |
| US-7,548,421 |
Impingement cooling of components in an electronic system A cooling apparatus adapted for impingement cooling of electronic components in an electronic system comprises an air mover, one or more heat sinks configured... |
| US-7,548,420 |
Electrical drive unit The present invention relates to an electrical drive unit comprising a circuit board, a plurality of components, attached to a first side of the circuit board, a... |
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