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Patent # Description
US-7,551,527 Offset calibration system and method of automatic power control loop
An offset calibration system of a control loop at least comprises an optical-to-electrical converter and an electrical-to-optical converter. The...
US-7,551,526 Disk drive apparatus and spherical aberration correcting method
A disk drive apparatus includes: an optical pickup irradiating a laser beam onto an optical disk having one or more recording layers through an objective lens...
US-7,551,525 Method for preventing excessive skipping on audio disks
The present invention provides for a method for reducing undesirable skipping during playback of a compact disc in a compact disc player. A lens system of the...
US-7,551,524 Methods and apparatus to compensate for power output variations over time
A method of compensating for output variations in laser power output over time in a system using a laser to record visible marks on an optical disc, the method...
US-7,551,523 Animated character alarm clock
An animated toy alarm clock resembles a stuffed puppy, kitten, or other lovable creature. When the alarm is armed, the creature rotates or bows its limbs so that...
US-7,551,522 Watch module comprising a rotary dial capable of being fitted to a watch movement
A watch module comprising a rotary dial (1) possessing an opening (2) for displaying a complication or an image. This rotary dial (1) is mounted rotatably on a...
US-7,551,521 Time information receiver and radio controlled watch
A time information receiver and radio controlled watch that receives a time code in which different data pulses are disposed one in a unit period. A composite...
US-7,551,520 Sensor for a short-range detection system and/or parking system of a motor vehicle and method for the...
The invention relates to a sensor (12) for a short-range detection system and/or parking system of a motor vehicle, especially an ultrasound sensor. The sensor...
US-7,551,519 Passive long range acoustic sensor
This Passive Long Range Acoustical Sensor relates to means of sensing acoustical sources and signals, including multi-channel acoustical signals, such as various...
US-7,551,518 Driving means for acoustic marine vibrator
A marine vibrator that in a particular embodiment includes a substantially elliptically shaped outer shell, a driver having a first and second end, at least one...
US-7,551,517 Seabed seismic station packaging
A seismic sensor station includes a housing containing a fiber optic hydrophone and a fiber optic accelerometer that can both be made from a single length of...
US-7,551,516 Vertical seismic profiling method utilizing seismic communication and synchronization
A while-drilling Vertical Seismic Profiling (VSP) data acquisition system utilizing the same seismic shots for three purposes is disclosed. First, the seismic...
US-7,551,515 Source signature deconvolution method
A method of filtering seismic signals is described using the steps of obtaining the seismic signals generated by activating a seismic source and recording...
US-7,551,514 Semiconductor memory utilizing a method of coding data
A semiconductor memory device utilizing a data coding method in an initial operation. The device includes a plurality of counters that count the number of data...
US-7,551,513 Semiconductor memory device and method of controlling sub word line driver thereof
A semiconductor memory device includes a sub word line driver for selectively connecting one of sub word lines with a main word line and applying a boosted...
US-7,551,512 Dual-port memory
A dual-port memory circuit includes a plurality of memory sub-blocks. Each of the memory sub-blocks includes a plurality of single-port memory cells, at least...
US-7,551,511 NAND flash memory device and method of forming a well of a NAND flash memory device
Disclosed herein are a NAND flash memory device and a method of forming a well of the NAND flash memory device. Triple wells of a NAND flash memory device are...
US-7,551,510 Memory block reallocation in a flash memory device
A non-volatile memory device has the pages of a certain memory block reallocated to other blocks in order to increase decrease disturb and increase reliability....
US-7,551,509 Power circuits for reducing a number of power supply voltage taps required for sensing a resistive memory
A resistive memory device requires a power supply having a reduced number of voltage taps and reduced power consumption. In accordance with one exemplary...
US-7,551,508 Energy efficient storage device using per-element selectable power supply voltages
An energy efficient storage device using per-element selectable power supply voltages provides energy conservation in storage devices while maintaining a...
US-7,551,507 Power supply circuit and semiconductor memory
A power supply circuit outputs different set potentials in response to control signals, wherein a voltage detecting circuit changes levels of a first reference...
US-7,551,506 Semiconductor apparatus, semiconductor storage apparatus, control signal generation method, and replacing method
A semiconductor apparatus according to the present invention includes a plurality of electric fuses that can be disconnected electrically, a selection circuit...
US-7,551,505 Memory refresh method and apparatus
An integrated circuit includes one or more memory array segments configured to store information and a refresh controller. Each memory array segment has a...
US-7,551,504 Apparatus and method of detecting refresh cycle of semiconductor memory
An apparatus for detecting a refresh period of a semiconductor memory includes a signal generating unit that generates a plurality of signal pairs, each of which...
US-7,551,503 Method for refreshing a flash memory
A plurality of cells of a flash memory are tested to determine if they need to be refreshed. The cells are read and a plurality of different sensing ratios are...
US-7,551,502 Semiconductor device
Double refresh executing means is changed in accordance with a manner (distributed refresh or burst refresh) of a refresh command so as to suppress a drop of...
US-7,551,501 Semiconductor memory device with temperature sensing device and operation thereof
A semiconductor memory device includes a thermosensor that senses present temperatures of the device and confirms whether the temperature values are valid. The...
US-7,551,500 Memory cell fuse circuit and controlling method thereof
A controlling method of a memory cell fuse circuit is provided. The memory cell fuse circuit at least includes a reference cell fuse circuit and a plurality of...
US-7,551,499 Semiconductor memory device capable of performing low-frequency test operation and method for testing the same
A semiconductor memory device and a method for testing the same are capable of performing a low-frequency test operation even when a high-frequency external...
US-7,551,498 Implementation of column redundancy for a flash memory with a high write parallelism
A redundant memory array has r columns of redundant memory cells, r redundant senses, and a redundant column decoder. Redundant address registers store addresses...
US-7,551,497 Memory circuits preventing false programming
Memory circuits capable of preventing false programming caused by power-up sequence are provided, in which a programmable unit comprises a plurality of...
US-7,551,496 Signal generator
There is provided a signal generator which includes a main memory which stores at least time data indicating timing when a state change of a timing pulse occurs...
US-7,551,495 Semiconductor memory device with a data output circuit configured to output stored data during a first type of...
The example semiconductor memory device may include a memory cell, a storage unit configured to store at least one data pattern, a data output circuit configured...
US-7,551,494 Single-poly non-volatile memory device and its operation method
A single-poly, P-channel non-volatile memory cell that is fully compatible with nano-scale semiconductor manufacturing process is provided. The single-poly,...
US-7,551,493 Data processing device
A data processing device which selects either emission of electrons from a nonvolatile memory cell or injection of electrons into it for each bit. A memory array...
US-7,551,492 Non-volatile semiconductor memory with page erase
In a nonvolatile memory, less than a full block maybe erased as one or more pages. A select voltage is applied through pass transistors to each of plural...
US-7,551,491 Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof
Unit cells of a non-volatile memory device and a method thereof are provided. In an example, the unit cell may include a first memory transistor and a second...
US-7,551,490 Flash memory device and method of reading data from flash memory device
A method of reading data from a flash memory device that includes a multiple block memory cell array, each block having a cell string connected to a bit line and...
US-7,551,489 Multi-level memory cell sensing
A multi-level cell memory device performs a read by providing a stepped voltage waveform on a wordline, and comparing cell currents to a substantially constant...
US-7,551,488 Semiconductor nonvolatile memory trimming technique for output characteristic control and redundancy repair
In a semiconductor nonvolatile memory, plural first nonvolatile memory cells are arranged in the memory array. Plural memory areas are arranged in the memory...
US-7,551,487 Nonvolatile memory device and related programming method
In a nonvolatile memory device, a first verification result indicates whether a block of memory cells has been successfully programmed and a second verification...
US-7,551,486 Iterative memory cell charging based on reference cell value
Systems and methods, including computer software for writing to a memory device include applying charge to each of multiple memory cells for storage of a...
US-7,551,485 Semiconductor memory device
A semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged therein; and a sense amplifier circuit configured to read...
US-7,551,484 Non-volatile memory and method with reduced source line bias errors
Source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits. During sensing the control gate voltage of a...
US-7,551,483 Non-volatile memory with predictive programming
In a nonvolatile memory having an array of memory cells, wherein the memory cells are individually programmable to one of a range of threshold voltage levels,...
US-7,551,482 Method for programming with initial programming voltage based on trial
A trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-volatile storage system. Based on...
US-7,551,481 User configurable commands for flash memory
A memory device includes a plurality of memory dies, each having an assigned address. A register on each die is reset on power-up. Boot data is loaded as part of...
US-7,551,480 Multi-bit flash memory device and memory cell array
A flash memory device comprises a plurality of memory blocks. A selected memory block among the plurality of memory blocks includes 2.sup.n pages of data. The...
US-7,551,479 Setting fail bit verification circuit with different reference fail numbers and a non-volatile semiconductor...
A reference fail bit verification circuit includes a fail bit counter which counts a number of fail bits to generate a first counting signal and a second...
US-7,551,478 Apparatus, method and computer program product for reading information stored in storage medium
An apparatus for reproducing information includes a memory unit which stores charge; a reading unit which obtains an amount of the charge stored in the memory...
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