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| Patent # | Description |
|---|---|
| US-7,552,331 |
Secure media path methods, systems, and architectures Methods, systems and architectures for processing renderable digital content are described. The various embodiments can protect against unauthorized access or... |
| US-7,552,330 |
Mutual authentication system between user and system An effective means for system authentication by a user.A system is characterized by connecting an electronic apparatus on the system management side to a... |
| US-7,552,329 |
Masked digital signatures The present invention relates to digital signature operations using public key schemes in a secure communications system and in particular for use with... |
| US-7,552,328 |
Security attributes of nodes in trusted computing systems A system and method for resolving a rule conflict within a security policy applied to a trusted computing platform, wherein the fileset to which each of the... |
| US-7,552,327 |
Method and apparatus for conducting a confidential search The present invention provides a method and apparatus for conducting a confidential search. The method comprises accessing one or more terms associated with one... |
| US-7,552,326 |
Use of kernel authorization data to maintain security in a digital
processing system A system to manage and control usage rights for cryptographic keys. A kernel process is provided with secure and exclusive authorization to access certain keys... |
| US-7,552,325 |
Methods, systems, and products for intrusion detection Methods, systems, and products are disclosed for detecting an intrusion to a communications network. One embodiment describes a peripheral card having a... |
| US-7,552,324 |
Printer and print system, and data receiving device and data transmitting
and receiving system A printer generates a public key with a passphrase containing at least printer position information and a random number by a public key cryptography, and holds... |
| US-7,552,323 |
System, apparatuses, methods, and computer-readable media using
identification data in packet communications Methods, systems and computer-readable data storage media for authentication and/or access authorization in a communications network. A source node initiates a... |
| US-7,552,322 |
Using a portable security token to facilitate public key certification for
devices in a network One embodiment of the present invention provides a system that uses a portable security token to facilitate public key certification for a target device in a... |
| US-7,552,321 |
Method and hybrid system for authenticating communications One embodiment of the present invention is a hybrid authentication system (10) for securing communication. In this embodiment, the system (10) includes a... |
| US-7,552,320 |
Arrangement for initiating a re-imaging process for a computer system An arrangement which eliminates the need to remove a computer system from its packaging in order to initiate a re-imaging process. Particularly, there is broadly... |
| US-7,552,319 |
Methods and apparatus to manage memory access An example method involves detecting a memory relocation process and disabling memory access to a memory block in response to detecting the memory relocation... |
| US-7,552,318 |
Branch lookahead prefetch for microprocessors A method of handling program instructions in a microprocessor which reduces delays associated with mispredicted branch instructions, by detecting the occurrence... |
| US-7,552,317 |
Methods and systems for grouping instructions using memory barrier
instructions Methods, systems, and articles of manufacture consistent with the present invention provide a memory instruction manager for managing the execution of... |
| US-7,552,316 |
Method and apparatus for compressing instructions to have consecutively
addressed operands and for... The apparatus and methods improve performance in a computer system by compressing a plurality of instructions having the same function with consecutively... |
| US-7,552,314 |
Fetching all or portion of instructions in memory line up to branch
instruction based on branch prediction and... The invention provides a method and apparatus for branch prediction in a processor. A fetch-block branch target buffer is used in an early stage of pipeline... |
| US-7,552,313 |
VLIW digital signal processor for achieving improved binary translation A VLIW digital signal processor is composed of a program memory including first to n-th banks, first to n-th address counters, a fetch block, and an instruction... |
| US-7,552,312 |
Identifying messaging completion in a parallel computer by checking for
change in message received and... Methods, parallel computers, and products are provided for identifying messaging completion on a parallel computer. The parallel computer includes a plurality of... |
| US-7,552,311 |
Memory device with preread data management The present invention provides a memory device that can flexibly decide the data to be preread. The memory device according to the present invention includes: a... |
| US-7,552,310 |
Virtualization and hosting service platform system and method A computer cluster for providing hosting services includes a plurality of nodes, and a control center coordinating activity of the nodes. Each node includes a... |
| US-7,552,309 |
Data storage methods for hierarchical copies A method for copying a logical volume in a data storage system, including forming a first logical volume having one or more logical partitions and storing data... |
| US-7,552,308 |
Method and apparatus for temporary mapping of executable program segments A computer implemented method, data processing system, and computer usable code are provided for managing memory use for program segments in an executable... |
| US-7,552,307 |
Method for initializing a random access memory A memory has a set of address spaces to which token data is written and read. Each address space has a token status bit. A token generator allocates token data... |
| US-7,552,306 |
System and method for the sub-allocation of shared memory This invention is directed to a system and method for allocation of random access memory. A memory area is first acquired from a primary memory allocation system... |
| US-7,552,305 |
Dynamic and real-time management of memory Dynamically allocated memory is managed in real-time. This real-time management capability enables an invalid access of the dynamically allocated memory to be... |
| US-7,552,304 |
Cost-aware design-time/run-time memory management methods and apparatus Methods, apparatus and software products are described for design-time data-assignment techniques for hierarchical memories, e.g., multi-banked memories in an... |
| US-7,552,303 |
Memory pacing A method, system, and program for managing memory page requests in a multi-processor data processing system determines a threshold value of available memory, and... |
| US-7,552,302 |
Ordering operation Executing an ordering operation is disclosed. A store operation associated with storing a value into a portion of a memory is initiated. An ordering operation to... |
| US-7,552,301 |
Information processing apparatus and memory access arranging method An information processing apparatus is provided which includes a processor for carrying out a pipeline processing over an instruction, a memory provided in the... |
| US-7,552,300 |
Method for migrating objects in content management systems through
exploitation of file properties, temporal... A migration object selection method selects data objects for migration from a source storage device to a target storage device. At a scheduled migration date,... |
| US-7,552,299 |
Data-processing apparatus, data-processing method and program A real-time reproduction determination unit determines whether or not AV data recorded in recording areas on an optical disc can be reproduced in a real-time... |
| US-7,552,298 |
Method and system for deferred pinning of host memory for stateful network
interfaces Certain aspects of a method and system for deferred pinning of host memory for stateful network interfaces are disclosed. Aspects of a method may include... |
| US-7,552,297 |
Instant copy of data in a cache memory via an atomic command A system and method are described to improve the efficiency of copy-on-write operations in a storage system. A PDSS descriptor associated with partition PSS and... |
| US-7,552,296 |
Symmetrical data change tracking A method, computer program product, computer system and system that enable symmetrical data change tracking with respect to a set of data and a copy of the set... |
| US-7,552,295 |
Maintaining consistency when mirroring data using different copy
technologies Provided are a method, system, and program for maintaining consistency when mirroring data using different copy technologies. Update groups having updates to... |
| US-7,552,294 |
System and method for processing multiple concurrent extended copy
commands to a single destination device Embodiments of the present invention provide systems and methods for processing concurrent extended copy commands. One embodiment can include a method for... |
| US-7,552,293 |
Kernel and application cooperative memory management Embodiments of the present invention provide a mechanism for an operating system and applications to cooperate in memory management. Applications register with... |
| US-7,552,292 |
Method of memory space configuration A method is disclosed for utilizing at least one bit within the logical address code of a memory unit formed by Dynamic Random Access Memory (DRAM) to be the... |
| US-7,552,291 |
System and method for subdividing a storage enclosure into separate
storage domains The storage enclosure includes a number of storage drives, each of which is physically coupled to each of two controllers in the storage enclosure. A memory... |
| US-7,552,290 |
Method for maintaining atomicity of instruction sequence to access a
number of cache lines during proactive... A method for maintaining atomicity of a sequence of instructions includes a processor requesting exclusive access to a given memory resource. The request may... |
| US-7,552,289 |
Method and apparatus for arbitrating access of a serial ATA storage device
by multiple hosts with separate host... An adapter unit operative to support access of an SATA storage device by a plurality of hosts associated with separate host adapters. The adapter unit includes a... |
| US-7,552,288 |
Selectively inclusive cache architecture In one embodiment, the present invention includes a method for maintaining data in a first level cache non-inclusively with data in a second level cache coupled... |
| US-7,552,287 |
Method and system of controlling a cache memory by interrupting prefetch
request with a demand fetch request A cache memory control unit that controls a cache memory comprises: a PF-PORT 22 and MI-PORT 21 that receive a prefetch request and demand fetch request issued... |
| US-7,552,286 |
Performance of a cache by detecting cache lines that have been reused A method and system for improving the performance of a cache. The cache may include an array of tag entries where each tag entry includes an additional bit... |
| US-7,552,285 |
Line fill techniques A line fill method, line fill unit and data processing apparatus are disclosed. The line fill method, comprises the steps of: a) associating a line fill buffer... |
| US-7,552,284 |
Least frequently used eviction implementation Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The... |
| US-7,552,283 |
Efficient memory hierarchy management In a processor, there are situations where instructions and some parts of a program may reside in a data cache prior to execution of the program. Hardware and... |
| US-7,552,282 |
Method, computer readable medium, and data storage system for selective
data replication of cached data Described are techniques for selective data replication. Cached data is replicated if it is characterized as critical. Critical data may include data associated... |
| US-7,552,281 |
Apparatus and method for processing data in a wireless terminal with
external memory An apparatus processes data using an external memory. In the apparatus, an external memory power supply provides power to the external memory. An external memory... |
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