Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,634,074 Transparent display substrates, transparent display devices and methods of manufacturing transparent display...
A transparent display substrate including a base substrate having a pixel area and a transmission area, a thickness of the base substrate at the transmission...
US-9,634,060 Stacked solid-state image sensor and imaging apparatus including the same
An image sensor includes a first semiconductor chip having a first surface and a second surface, the first semiconductor chip a including an array of unit...
US-9,634,058 Image sensor and computing system having the same
An image sensor includes a light receiving element, an anti-reflection layer, a high refractive pattern, a color filter, and a micro lens. The light receiving...
US-9,634,057 Digital detector possessing a generator of light enabling optical wiping
A solid-state radiation detector comprising a photosensitive sensor comprises photosensitive elements that are organized in a matrix, and a light generator...
US-9,634,052 Semiconductor device, solid-state image sensor and camera system
The present invention relates to a semiconductor device, a solid-state image sensor and a camera system capable of reducing the influence of noise at a...
US-9,634,050 Fabrication of optics wafer
Fabricating an optics wafer includes providing a wafer including a core region composed of a glass-reinforced epoxy. The wafer further includes a first resin...
US-9,634,045 Method for forming thin film pattern
The present disclosure provides a method for forming a thin film pattern. The method includes steps of: forming a mask pattern on a thin film in such a manner...
US-9,634,043 Array substrate, manufacturing method thereof, display device, thin-film transistor (TFT) and manufacturing...
An array substrate, a manufacturing method thereof, a display device, a thin-film transistor (TFT) and a manufacturing method thereof are disclosed. The method...
US-9,634,026 Standard cell architecture for reduced leakage current and improved decoupling capacitance
A standard cell IC may include a plurality of pMOS transistors each including a pMOS transistor drain, a pMOS transistor source, and a pMOS transistor gate....
US-9,634,023 Vertical memory devices
According to example embodiments, a vertical memory device includes a low resistance layer on a lower insulation layer, a channel layer on the low resistance...
US-9,634,016 Semiconductor device and method of manufacturing the same
A semiconductor device includes a substrate having a cell region, wherein a contact region, page buffer regions, and a scribe lane region are defined around the...
US-9,634,013 Contact for semiconductor fabrication
A semiconductor device includes a substrate, a fin structure on the substrate, the fin structure comprising a doped region, a first gate over the fin structure,...
US-9,634,011 Semiconductor device having buried gate structure and method for manufacturing the same, memory cell having the...
A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a...
US-9,634,010 Field effect transistor device spacers
A method for forming field effect transistors comprises forming a first dummy gate stack over a first fin, forming a second dummy gate stack over a second fin,...
US-9,634,004 Forming reliable contacts on tight semiconductor pitch
Semiconductor devices include a passivating layer over a pair of fins. A barrier extends through the passivating layer and between the pair of fins and that...
US-9,633,995 Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS...
A method of fabricating a MOSFET transistor in a SiGe BICMOS technology and resulting structure having a drain-gate feedback capacitance shield formed between a...
US-9,633,993 Bipolar SCR
A high-voltage bipolar semiconductor controlled rectifier (SCR) includes an emitter region having a first polarity and overlying a base region having a second...
US-9,633,991 Mutual ballasting multi-finger bidirectional ESD device
An integrated circuit includes a bidirectional ESD device which has a plurality of parallel switch legs. Each switch leg includes a first current switch and a...
US-9,633,988 Apparatuses and methods of communicating differential serial signals including charge injection
Apparatuses and methods are disclosed, including an apparatus that includes a differential driver with charge injection pre-emphasis. One such apparatus...
US-9,633,984 Semiconductor module
According to one embodiment, a semiconductor module includes a first semiconductor element, a second semiconductor element, a first light emitting element and a...
US-9,633,983 Semiconductor chip stacking assemblies
Embodiments of the invention provide semiconductor chip stacking assemblies that provide direct attachment of a first semiconductor device with a second...
US-9,633,982 Method of manufacturing semiconductor device array
Present disclosure provides a method for manufacturing a semiconductor device array, including (1) providing a temporary substrate; (2) forming a plurality of...
US-9,633,981 Systems and methods for bonding semiconductor elements
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first...
US-9,633,980 Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor chip including a first circuit, a second circuit, a first interconnect...
US-9,633,978 Semiconductor device and method of manufacturing the same
A semiconductor device includes a wiring substrate, a first semiconductor chip flip-chip connected to the wiring substrate, a first underfill resin filled...
US-9,633,975 Multi-die wirebond packages with elongated windows
A microelectronic package can include a substrate having first and second opposed surfaces extending in first and second transverse directions and an opening...
US-9,633,974 System in package fan out stacking architecture and process flow
Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), and a...
US-9,633,973 Semiconductor package
A semiconductor package is provided comprising a package substrate having an opening located in a central region thereof and a circuit pattern provided adjacent...
US-9,633,972 Method for manufacturing semiconductor display panel
A manufacturing method includes: attaching a film onto a bonding surface of a wafer; performing laser cutting on the wafer to obtain a plurality of...
US-9,633,971 Structures and methods for low temperature bonding using nanoparticles
A method of making an assembly can include forming a first conductive element at a first surface of a substrate of a first component, forming conductive...
US-9,633,970 IGBT device and method for packaging whole-wafer IGBT chip
An IGBT device and a method for packaging a whole-wafer IGBT chip. The IGBT device comprises: an entire wafer IGBT chip, the upper surface thereof comprising a...
US-9,633,964 Wiring substrate and electronic component device
A wiring substrate includes a connection pad formed in the outermost wiring layer, a dummy pad formed in the outermost wiring layer, and a dummy wiring portion...
US-9,633,962 Plug via formation with grid features in the passivation layer
Solder bump connections and methods for fabricating solder bump connections. A passivation layer is formed on a dielectric layer. Via openings extend through...
US-9,633,961 Packaging devices and methods of manufacture thereof
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad...
US-9,633,960 Chip with I/O pads on peripheries and method making the same
A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; at least two metal layers, formed above the...
US-9,633,959 Integrated circuit die with corner IO pads
An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO...
US-9,633,958 Bonding pad surface damage reduction in a formation of digital pattern generator
A method of fabricating a Digital pattern generator (DPG) device is disclosed. The method includes forming an etch-stop-layer (ESL) over a bonding pad in a...
US-9,633,956 RF switch on high resistive substrate
A device includes a semiconductor substrate of a first conductivity type, and a deep well region in the semiconductor substrate, wherein the deep well region is...
US-9,633,952 Substrate structure and method for manufacturing same
Provided is a substrate structure, including: a first substrate and a second substrate arranged correspondingly. A first surface of the first substrate faces a...
US-9,633,950 Integrated device comprising flexible connector between integrated circuit (IC) packages
Some features pertain to an integrated device that includes a first integrated circuit (IC) package, a flexible connector and a second integrated circuit (IC)...
US-9,633,948 Low energy etch process for nitrogen-containing dielectric layer
A stack that includes, from bottom to top, a nitrogen-containing dielectric layer, an interconnect level dielectric material layer, and a hard mask layer is...
US-9,633,945 Semiconductor device and method of manufacturing semiconductor device
According to one embodiment, there is provided a semiconductor device, which includes an electrode lead-out part, a planarization film, contacts, and first and...
US-9,633,944 Semiconductor device and manufacturing method thereof
A semiconductor device and a manufacturing method thereof are provided. A semiconductor device includes a stack structure including conductive layers stacked in...
US-9,633,941 Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first...
US-9,633,938 Hybrid pitch package with ultra high density interconnect capability
A hybrid pitch package includes a standard package pitch zone of the package having only standard package pitch sized features that is adjacent to a smaller...
US-9,633,935 Stacked chip package including substrate with recess adjoining side edge of substrate and method for forming...
A stacked chip package is provided. The stacked chip package includes a first substrate having a first side and a second side opposite thereto. The first...
US-9,633,934 Semicondutor device and method of manufacture
A semiconductor device and method for providing an enhanced removal of heat from a semiconductor die within an integrated fan out package on package...
US-9,633,927 Chip arrangement and method for producing a chip arrangement
A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a...
US-9,633,920 Low damage passivation layer for III-V based devices
The present disclosure relates to a structure and method of forming a low damage passivation layer for III-V HEMT devices. In some embodiments, the structure...
US-9,633,917 Three dimensional integrated circuit structure and method of manufacturing the same
Provided is a three dimensional integrated circuit structure including a first die, a through substrate via and a connector. The first die is bonded to a second...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.