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Patent # | Description |
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US-9,647,162 |
Electronic power cell memory back-up battery An electronic power cell memory back-up battery is disclosed. The electronic power cell memory back-up battery utilizes stored light photons to produce usable... |
US-9,647,161 |
Method of manufacturing a device comprising an integrated circuit and
photovoltaic cells According to one embodiment, the present invention relates to a method for manufacturing a photovoltaic device comprising a photovoltaic cell or a plurality of... |
US-9,647,160 |
Adhesives for attaching wire network to photovoltaic cells Provided are novel methods of fabricating photovoltaic modules using pressure sensitive adhesives (PSA) to secure wire networks of interconnect assemblies to... |
US-9,647,159 |
Photovoltaic panel A photovoltaic panel (10) comprising a back plate (12), a front sheet (20) and a photovoltaic cell (30) disposed between the back plate (12) and the front sheet... |
US-9,647,158 |
Photovoltaic sub-cell interconnects Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited... |
US-9,647,157 |
Discrete attachment point apparatus and system for photovoltaic arrays An attachment point apparatus and system for photovoltaic arrays is disclosed as well as an installed photovoltaic array using attachment apparatus. One... |
US-9,647,156 |
Heteroepitaxial growth of orientation-patterned materials on
orientation-patterned foreign substrates A layered OP material is provided that comprises an OPGaAs template, and a layer of GaP on the OPGaAs template. The OPGaAs template comprises a patterned layer... |
US-9,647,155 |
Long wave photo-detection device for used in long wave infrared detection,
materials, and method of fabrication The disclosure provides a photo-detection device for use in long-wave infrared detection and a method of fabrication. The device comprises a GaSb substrate, a... |
US-9,647,154 |
Ordered superstructures of octapod-shaped nanocrystals, their process of
fabrication and use thereof This invention relates to the controlled realization of ordered superstructures of octapod-shaped colloidal nanocrystals, formed either in the liquid phase or... |
US-9,647,153 |
Method for forming thin film chalcogenide layers The disclosed technology generally relates to chalcogenide thin films, and more particularly to ternary and quaternary chalcogenide thin films having a wide... |
US-9,647,152 |
Sensor circuit and semiconductor device including sensor circuit A sensor circuit includes a transistor comprising an oxide semiconductor; a first circuit which supplies one of a first potential and a second potential; a... |
US-9,647,151 |
Checking the stoichiometry of I-III-VI layers for use in photovoltaic
using improved electrolysis conditions The invention relates to manufacturing a I-III-VI compound in the form of a thin film for use in photovoltaics, including the steps of: a) electrodepositing a... |
US-9,647,150 |
Monolithic integration of plenoptic lenses on photosensor substrates A monolithic integration of a plenoptic structure on an image sensor is provided using material with low refractive index on the substrate of photosensors and... |
US-9,647,149 |
Method and system for rapid and controlled elevation of a raisable floor
for pools A method for assembling a rapid elevation floor system in a pool, the method comprising the stages of: assembling a raisable floor inside said pool and adding... |
US-9,647,148 |
Device for individual finger isolation in an optoelectronic device An optoelectronic device including at least one of a solar device, a semiconductor device, and an electronic device. The device includes a semiconductor unit. A... |
US-9,647,147 |
Solar battery cell and production method thereof A solar battery cell, including semiconductor substrate, an insulating film formed on one face side of the semiconductor substrate, and an electrode... |
US-9,647,146 |
Semiconductor device, manufacturing method, and electronic apparatus A method of manufacturing a semiconductor device includes: forming, on a cover glass, a film having a predetermined specific gravity and configured to shield an... |
US-9,647,145 |
Method, apparatus, and system for increasing junction electric field of
high current diode Diodes for use in FinFET technologies having increased junction electric fields without the need for increased dopant concentrations, as well as methods,... |
US-9,647,144 |
Integrated magnetic field sensor and method for a measurement of the
position of a ferromagnetic workpiece with... An integrated magnetic field sensor, having a semiconductor body with a surface and a rear surface, and a metal carrier, with a front and a rear, wherein the... |
US-9,647,143 |
Non-volatile memory unit and method for manufacturing the same A non-volatile memory unit and method of manufacturing the same are disclosed. The non-volatile memory unit includes a substrate with a source region and a... |
US-9,647,142 |
Method for producing semiconductor device and semiconductor device A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first... |
US-9,647,141 |
Thin film transistor and method of manufacturing the same Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical... |
US-9,647,140 |
Thin film transistor A thin film transistor disposed on a substrate, includes a gate, a gate insulation layer, a first source/drain, a semiconductor layer and a second source/drain.... |
US-9,647,139 |
Atomic layer deposition sealing integration for nanosheet complementary
metal oxide semiconductor with... A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate... |
US-9,647,138 |
Metal oxide semiconductor transistor A metal oxide semiconductor transistor includes a gate, a metal oxide active layer, a gate insulating layer, a source, and a drain. The metal oxide active layer... |
US-9,647,137 |
Oxide semiconductor, thin film transistor, and display device An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and... |
US-9,647,136 |
Thin film transistor, thin film transistor panel, and method for
manufacturing the same A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced... |
US-9,647,135 |
Tin based p-type oxide semiconductor and thin film transistor applications This disclosure provides p-type metal oxide semiconductor thin films that display good thin film transistor (TFT) characteristics. The p-type metal oxide thin... |
US-9,647,134 |
Thin-film transistor and method for manufacturing the same According to one embodiment, a thin-film transistor comprises an oxide semiconductor layer formed on a part of a substrate, a first gate insulator film of a... |
US-9,647,133 |
Low contact resistance thin film transistor The present invention relates to a novel thin film transistor (TFT) comprising a substrate (100) with a gate electrode layer (101) deposited and patterned... |
US-9,647,132 |
Semiconductor device and memory device A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor.... |
US-9,647,131 |
Semiconductor device, power circuit, and manufacturing method of
semiconductor device The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second... |
US-9,647,130 |
Display device According to one embodiment, a display device includes a thin-film transistor. The thin-film transistor includes a gate electrode, an insulating layer disposed... |
US-9,647,129 |
Semiconductor device To provide a semiconductor device which occupies a small area and is highly integrated. The semiconductor device includes an oxide semiconductor layer, an... |
US-9,647,128 |
Semiconductor device To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The... |
US-9,647,127 |
Semiconductor device and method for manufacturing the same Provided are a semiconductor device and a method for manufacturing the same. The semiconductor device comprises an insulating layer and a metal oxide... |
US-9,647,126 |
Oxide for semiconductor layer in thin film transistor, thin film
transistor, display device, and sputtering target Provided is an oxide semiconductor configured to be used in a thin film transistor having high field-effect mobility; a small shift in threshold voltages... |
US-9,647,125 |
Semiconductor device and method for manufacturing the same A first trench and a second trench are formed in an insulating layer, a transistor including an oxide semiconductor layer in the first trench is formed, and a... |
US-9,647,124 |
Semiconductor devices with graphene nanoribbons Semiconductor devices with graphene nanoribbons and methods of manufacture are disclosed. The method includes forming at least one layer of Si material on a... |
US-9,647,123 |
Self-aligned sigma extension regions for vertical transistors A semiconductor structure including vertical transistors is provided in which a sigma shaped source/drain extension region is formed between a top faceted... |
US-9,647,122 |
Semiconductor device and method of forming the same A semiconductor device includes a substrate, at least one semiconductor fin, and at least one epitaxy structure. The semiconductor fin is present on the... |
US-9,647,121 |
Structure for HCI improvement in bulk finFET technologies A field effect transistor (FET) is disclosed having one or more fins and providing an increased depletion layer as compared to conventional finFETs. The finFET... |
US-9,647,120 |
Vertical FET symmetric and asymmetric source/drain formation A method for forming features of a vertical FET device, starting with a semiconductor substrate that includes fins and a horizontal surface. The fins also have... |
US-9,647,119 |
Structure and method for tensile and compressive strained silicon
germanium with same germanium concentration... A method of making a semiconductor device includes forming a first silicon germanium layer on a substrate, the first silicon germanium layer forming a portion... |
US-9,647,118 |
Device having EPI film in substrate trench The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a trench in the... |
US-9,647,117 |
Apparatus and method for forming semiconductor contacts A method comprises forming a fin structure over a substrate, wherein the fin structure comprises a channel connected between a drain region and a source region,... |
US-9,647,116 |
Method for fabricating self-aligned contact in a semiconductor device A semiconductor device includes a gate structure disposed over a substrate, and sidewall spacers disposed on both side walls of the gate structure. The sidewall... |
US-9,647,115 |
Semiconductor structure with enhanced contact and method of manufacture
the same A method of forming a semiconductor structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy... |
US-9,647,114 |
Methods of forming highly p-type doped germanium tin films and structures
and devices including the films Methods of forming p-type doped germanium-tin layers, systems for forming the p-type doped germanium-tin layers, and structures including the p-type doped... |
US-9,647,113 |
Strained FinFET by epitaxial stressor independent of gate pitch A semiconductor device fabrication process includes forming a fin and a plurality of gates upon a semiconductor substrate, forming sacrificial spacers upon... |