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Patent # Description
US-9,711,664 Flexible transparent solar cell and production process of the same
The invention provides a flexible transparent solar cell and a production process of the same, and belongs to the technical field of solar cell. The flexible...
US-9,711,661 Semiconductor device and manufacturing method thereof
A technique of suppressing leak current in a semiconductor device is provided. A semiconductor device, comprises: a semiconductor layer made of a semiconductor;...
US-9,711,650 Vertical thin film transistor selection devices and methods of fabrication
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and method of fabricating such a memory...
US-9,711,646 Semiconductor structure and manufacturing method for the same
A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a first gate structure, a second gate...
US-9,711,645 Method and structure for multigate FinFET device epi-extension junction control by hydrogen treatment
Embodiments are directed to forming a structure comprising at least one fin, a gate, and a spacer, applying an annealing process to the structure to create a...
US-9,711,643 ESD robust MOS device
A semiconductor device includes a body and a transistor fabricated into the body. Isolation material at least partially encases the body. Biasing is coupled to...
US-9,711,640 Vertical conduction integrated electronic device protected against the latch-up and relating manufacturing process
A vertical conduction integrated electronic device including: a semiconductor body; a trench that extends through part of the semiconductor body and delimits a...
US-9,711,638 Semiconductor device using diamond
A semiconductor device includes a MISFET having: a diamond substrate; a drift layer having a first layer with a first density for providing a hopping conduction...
US-9,711,629 Semiconductor device having low-dielectric-constant film
Provided is a semiconductor device including a plurality of trenches, including an emitter electrode; a floating layer of a first conduction type provided...
US-9,711,627 Power semiconductor device and fabrication method thereof
A method for forming a power semiconductor device is provided. The method includes providing a substrate having a first surface and a second surface; and...
US-9,711,625 Method for manufacturing thin-film transistor
A method for manufacturing a thin-film transistor includes: forming a first metal layer of a pattern including a gate on a substrate through pattern formation...
US-9,711,623 FinFETs with vertical Fins and methods for forming the same
In a method for forming a device, a (110) silicon substrate is etched to form first trenches in the (110) silicon substrate, wherein remaining portions of the...
US-9,711,616 Dual-channel field effect transistor device having increased amplifier linearity
A dual-channel field effect transistor (FET) device having increased amplifier linearity and a method of manufacturing same are disclosed. In an embodiment, the...
US-9,711,610 Semiconductor device having oxide semiconductor layer
The reliability of a semiconductor device is increased by suppression of a variation in electric characteristics of a transistor as much as possible. As a cause...
US-9,711,605 Contact for high-k metal gate device
An integrated circuit having an improved gate contact and a method of making the circuit are provided. In an exemplary embodiment, the method includes receiving...
US-9,711,599 Wide bandgap high-density semiconductor switching device and manufacturing process thereof
A switching device, such as a barrier junction Schottky diode, has a body of silicon carbide of a first conductivity type housing switching regions of a second...
US-9,711,598 Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins The techniques can be employed, for instance, in fabricating fin-based...
US-9,711,585 Organic light emitting diode display
An organic light emitting diode display according to an example embodiment of the present invention includes: a substrate; a scan line and a data line that are...
US-9,711,581 Display unit
A display unit with which lowering of long-term reliability of a transistor is decreased is provided. The display unit includes a display section having a...
US-9,711,571 Smart window comprising electrochromic device and organic light-emitting device
A smart window is provided. The smart window includes an organic light-emitting device including first and second electrodes corresponding to each other, and a...
US-9,711,566 Magnetoresistive device design and process integration with surrounding circuitry
Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such...
US-9,711,558 Imaging device with photoelectric converter
An imaging device including a unit pixel cell comprising: a semiconductor substrate including a first conductivity type region of a first conductivity type, a...
US-9,711,543 Liquid crystal display and method for manufacturing the same
A liquid crystal display device includes a gate line and a data line disposed on a substrate; a thin film transistor (TFT) provided between the gate line and...
US-9,711,540 LTPS array substrate
An LTPS array substrate includes a plurality of LTPS thin-film transistors and a bottom transparent conductive layer, a protective layer, and a top transparent...
US-9,711,535 Method of forming FinFET channel
A method for fabricating a semiconductor device having a substantially undoped channel region includes performing an ion implantation into a substrate,...
US-9,711,525 Three-dimensional semiconductor device and manufacturing method thereof
Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes: source select lines, word lines, drain select lines,...
US-9,711,523 Semiconductor devices
Provided is a semiconductor device, including gate structures on a substrate, the gate structures extending parallel to a first direction and being spaced apart...
US-9,711,507 Separate N and P fin etching for reduced CMOS device leakage
A method for forming a semiconductor device includes blocking a first region of a wafer and forming a plurality of fins in a second region of the wafer. A...
US-9,711,504 Semiconductor device
A semiconductor device includes a substrate including a first trench, a first fin pattern on the substrate that is defined by the first trench, a gate electrode...
US-9,711,489 Multiple pixel surface mount device package
Emitter packages and LEDs displays utilizing the packages are disclosed, with the packages providing advantages such as reducing the cost and interconnect...
US-9,711,480 Environmental hardened packaged integrated circuit
A packaged integrated circuit for operating reliably at elevated temperatures is provided. The packaged integrated circuit includes a modified extracted die,...
US-9,711,476 Wiring board and electronic component device
A wiring board includes: an insulating layer; a pad including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the...
US-9,711,472 Solder bump for ball grid array
A solder bump structure for a ball grid array (BGA) includes at least one under bump metal (UBM) layer and a solder bump formed over the at least one UBM layer....
US-9,711,470 Package on package structure and method for forming the same
The described embodiments of mechanisms of forming a package on package (PoP) structure involve bonding with connectors with non-solder metal balls to a...
US-9,711,467 Method for manufacturing a semiconductor component having a common mode filter monolithically integrated with a...
In accordance with an embodiment, a semiconductor component, includes a common mode filter monolithically integrated with a protection device. The common mode...
US-9,711,456 Composite manganese nitride/low-K dielectric cap
A semiconductor device includes a metal-containing structure such as a copper-containing wire or plug and a composite capping layer formed over the...
US-9,711,450 Interconnect structures with enhanced electromigration resistance
Interconnect structures are provided that include an intermetallic compound as either a cap or liner material. The intermetallic compound is a thermal reaction...
US-9,711,445 Package substrate, package structure including the same, and their fabrication methods
This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first...
US-9,711,444 Packaging module and substrate structure thereof
A substrate structure is provided, including: a circuit board having a plurality of wiring layers; a first circuit layer; a plurality of conductive posts...
US-9,711,442 Semiconductor structure
A semiconductor structure is provided. The semiconductor structure includes an electronic component and a board structure. The board structure includes a...
US-9,711,439 Printed wiring board and method for manufacturing the same
A printed wiring board includes an insulating layer including insulating material, and a conductor layer formed on a surface of the insulating layer and...
US-9,711,428 Dual-sided die packages
An apparatus including a die, a first side of the die including a first type of system level contact points and a second side including a second type of contact...
US-9,711,424 Low thermal stress package for large area semiconductor dies
A low thermal stress package for large area semiconductor dies. The package may include a substrate and at least one pedestal extending from the substrate,...
US-9,711,422 Visually detecting electrostatic discharge events
Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color...
US-9,711,419 Substrate backside texturing
Embodiments described relate to a method and apparatus for reducing lithographic distortion. A backside of a semiconductor substrate may be texturized. Then a...
US-9,711,411 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first gate structure and a second...
US-9,711,410 Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width
Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described. For example, a...
US-9,711,408 Integrated circuit structure and method for manufacturing thereof
A method of manufacturing an integrated circuit structure includes forming a plurality of gate stacks on a first area and a second area of a substrate. A...
US-9,711,401 Reliable packaging and interconnect structures
Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an...
US-9,711,399 Direct plasma densification process and semiconductor devices
An aspect of the present disclosure relates to a method of forming a barrier layer on a semiconductor device. The method includes placing a substrate into a...
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