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Patent # Description
US-9,748,427 MWIR photodetector with compound barrier with P-N junction
The invention describes a device which enables MWIR photodetectors to operate at zero bias and deliver low dark current performance. The performance is achieved...
US-9,748,426 Monolithic multiple solar cells
A monolithic multiple solar cell includes at least three partial cells, with a semiconductor mirror placed between two partial cells. The aim of the invention...
US-9,748,425 Photoelectric conversion element and photovoltaic cell
A photoelectric conversion element includes a PN junction formed from an N-type oxide layer and a P-type oxide layer. The P-type oxide layer is formed from an...
US-9,748,424 Solar cell and preparing method of the same
A solar cell according to the embodiment includes a back electrode layer on a support substrate; a first through hole dividing the back electrode layer into a...
US-9,748,423 Photovoltaic device with fiber array for sun tracking
Disclosed is a photovoltaic device that includes a solar cell on a light transmissive substrate in the form of an array of equal diameter optical fibers laid...
US-9,748,422 Semiconductor nanocrystals
A semiconductor nanocrystal include a first I-III-VI semiconductor material and have a luminescence quantum yield of at least 10%, at least 20%, or at least...
US-9,748,421 Multiple carbon nanotube transfer and its applications for making high-performance carbon nanotube field-effect...
A wafer-scale multiple carbon nanotube transfer process is provided. According to one embodiment of the invention, plasma exposure processes are performed at...
US-9,748,420 High accuracy module assembly process
The present invention relates to an assembling method for a base plate of a concentrated photovoltaic module comprising the steps of: assembling a heat sink on...
US-9,748,419 Back contact design for solar cell, and method of fabricating same
A method includes depositing spacers at a plurality of locations directly on a back contact layer over a solar cell substrate. An absorber layer is formed over...
US-9,748,418 Solar cell and method for producing same
A rear contact heterojunction solar cell and a fabricating method. The solar cell comprises a silicon substrate having a passivating layer and an intrinsic...
US-9,748,417 Composition for forming solar cell electrode and electrode produced from same
A composition for solar cell electrodes and electrodes fabricated using the same. The composition includes a silver (Ag) powder; a first glass frit containing...
US-9,748,416 Optical detector apparatus, method, and applications
An optical device including a shaped electrode on a substrate thereof utilizes total internal reflection to provide improved transmission of electromagnetic...
US-9,748,415 Fast process flow, on-wafer interconnection and singulation for MEPV
A method including providing a substrate comprising a device layer on which a plurality of device cells are defined; depositing a first dielectric layer on the...
US-9,748,414 Self-activated front surface bias for a solar cell
A self-activated front surface bias for photovoltaic solar cell assembly is provided. The solar cell assembly comprises a front surface electrical bias...
US-9,748,413 Solar cell module
In a solar cell module, a plurality of solar cells are provided between a front surface protection member and a back surface protection member and bus bar...
US-9,748,412 Highly responsive III-V photodetectors using ZnO:Al as N-type emitter
A photodiode includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. An intrinsic layer is formed over the substrate...
US-9,748,411 Wide bandgap semiconductor switching device with wide area schottky junction, and manufacturing process thereof
A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a...
US-9,748,410 N-type aluminum nitride single-crystal substrate and vertical nitride semiconductor device
A vertical nitride semiconductor device includes an n-type aluminum nitride single-crystal substrate having an Si content of 3.times.10.sup.17 to...
US-9,748,409 Power semiconductor devices incorporating single crystalline aluminum nitride substrate
The invention provides a power semiconductor device including an aluminum nitride single crystalline substrate, wherein the dislocation density of the substrate...
US-9,748,408 High-voltage semiconductor device and method of producing the same
The semiconductor drift device comprises a deep well of a first type of electrical conductivity provided for a drift region in a substrate of semiconductor...
US-9,748,407 Semiconductor device and method of manufacturing same
An object is to provide a reliability-improved semiconductor device having a MONOS memory that rewrites data by injecting carriers into a charge storage...
US-9,748,406 Semi-floating-gate device and its manufacturing method
The disclosure, belonging to the technological field of semiconductor memory, specifically relates to a semi-floating-gate device which comprises at least a...
US-9,748,405 Transistor and fabrication method thereof
A method for fabricating a transistor is provided. The method includes providing a semiconductor substrate; and forming at least a nanowire suspending in the...
US-9,748,404 Method for fabricating a semiconductor device including gate-to-bulk substrate isolation
A method for fabricating a semiconductor device comprises forming a sacrificial layer of a first semiconductor material on a substrate, a layer of a second...
US-9,748,403 Semiconductor device and display device including the semiconductor device
The reliability of a transistor including an oxide semiconductor is improved. The transistor in a semiconductor device includes a first oxide semiconductor film...
US-9,748,402 Semiconductor element and organic light emitting display device having a semiconductor element
A semiconductor element includes a substrate, a gate electrode, an active layer, a contact layer, a first electrode, and a second electrode. The gate electrode...
US-9,748,401 Transistor and semiconductor device
Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide...
US-9,748,400 Semiconductor device
A semiconductor device in which a transistor using an oxide semiconductor containing In, Zn, or the like for a channel region can be driven like a p-channel...
US-9,748,399 Semiconductor device and display device comprising an oxide semiconductor channel region having a different...
To provide a novel semiconductor device in which a reduction in channel length is controlled. The semiconductor device includes an oxide semiconductor layer...
US-9,748,398 Thin film transistor and manufacturing method thereof, display device
A thin film transistor, its manufacturing method, and a display device are provided. The method comprises: forming a gate metal layer (35), forming a step-like...
US-9,748,397 Thin film transistor substrate and display device comprising the same
A thin-film transistor substrate is disclosed, which comprises a base layer; a semiconductor layer disposed on the base layer; a source electrode and a drain...
US-9,748,396 Thin film transistor and method of manufacturing the same
As source and drain wiring, a base layer and a cap layer are each formed of a MoNiNb alloy film, and a low-resistance layer is formed of Cu. The resultant...
US-9,748,395 Thin film transistor and manufacturing method thereof
A thin film transistor includes a substrate, a gate electrode disposed on the substrate, a channel layer located on the gate electrode, a gate insulation layer...
US-9,748,394 FinFET having a multi-portioned gate stack
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a...
US-9,748,393 Silicon carbide semiconductor device with a trench
It is an object of the present invention to provide a silicon carbide semiconductor device that reduces a channel resistance and increases reliability of a gate...
US-9,748,392 Formation of work-function layers for gate electrode using a gas cluster ion beam
An angled gas cluster ion beam is used for each sidewall and top of a fin (two applications) to form work-function metal layer(s) only on the sidewalls and top...
US-9,748,391 Field effect transistor with narrow bandgap source and drain regions and method of fabrication
A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer...
US-9,748,390 Semiconductor device and method of forming the same
A method of forming a semiconductor device includes forming a NMOS gate structure over a substrate. The method further includes forming an amorphized region in...
US-9,748,389 Method for semiconductor device fabrication with improved source drain epitaxy
A method includes receiving a precursor having a substrate and first and second pluralities of gate structures, the first pluralities having a greater pitch...
US-9,748,388 Method of forming strained structures of semiconductor devices
A method of fabricating a semiconductor device comprises providing a substrate with a shallow trench isolation (STI) within the substrate and a gate stack. A...
US-9,748,387 Methods of forming PMOS FinFET devices and multiple NMOS FinFET devices with different performance characteristics
One method disclosed includes forming first, second and third fins for a first NMOS device, a PMOS device and a second NMOS device, respectively. According to...
US-9,748,386 Epitaxial structure of semiconductor device and manufacturing method thereof
An epitaxial structure of semiconductor device includes a substrate, a recess, a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer....
US-9,748,385 Method for forming vertical Schottky contact FET
A semiconductor structure containing a vertical Schottky contact transistor is provided in which the contact resistance as well as the junction resistance is...
US-9,748,384 Semiconductor component and manufacturing method thereof
A semiconductor component including: a semiconductor substrate; and a semiconductor device provided thereon, the device being a field-effect transistor that...
US-9,748,383 Transistor
A Metal Oxide Semiconductor (MOS) transistor comprising: a source; a gate; and a drain, the source, gate and drain being located in or on a well structure of a...
US-9,748,382 Self aligned top extension formation for vertical transistors
A method of forming a semiconductor device that includes providing a vertically orientated channel region; and converting a portion of an exposed source/drain...
US-9,748,381 Pillar formation for heat dissipation and isolation in vertical field effect transistors
A method of fabricating a vertical field effect transistor includes forming fins from a portion of a substrate. At least a first fin of the fins is associated...
US-9,748,380 Vertical transistor including a bottom source/drain region, a gate structure, and an air gap formed between the...
A vertical transistor includes a fin structure formed on a substrate, a gate structure formed on the fin structure, and a bottom source/drain (S/D) region...
US-9,748,379 Double exponential mechanism controlled transistor
The present disclosure relates to a tunnel FET device with a steep sub-threshold slope, and a corresponding method of formation. In some embodiments, the tunnel...
US-9,748,378 Semiconductor device, integrated circuit and method of manufacturing a semiconductor device
A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region,...
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