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Patent # Description
US-9,780,234 Photovoltaic bypass and output switching
A PhotoVoltaic (PV) panel switching arrangement includes a first switch and a second switch, which in some embodiments are in a DC converter. The first switch...
US-9,780,233 Solar cell module, solar cell module assembly, and solar photovoltaic power generation system
A solar cell module, a solar cell module assembly, and a solar photovoltaic power generation system capable of reducing power loss are provided. A...
US-9,780,232 Memory semiconductor device with peripheral circuit multi-layer conductive film gate electrode and method of...
To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor...
US-9,780,231 Integrated circuits with flash memory and methods for producing the same
Integrated circuits and methods of producing such integrated circuits are provided. In an exemplary embodiment, an integrated circuit includes a substrate with...
US-9,780,230 Semiconductor structure with oxide semiconductor layer
The present invention provides a semiconductor structure, including a base, a patterned oxide semiconductor (OS) layer, two source/drain regions, a protective...
US-9,780,229 Method for manufacturing semiconductor device
An object of an embodiment of the present invention is to provide a semiconductor device including a normally-off oxide semiconductor element whose...
US-9,780,228 Oxide semiconductor device and method for manufacturing same
Provided are an oxide semiconductor device and a method for manufacturing same, wherein the oxide semiconductor device according to an embodiment of the...
US-9,780,227 Thin-film transistor and method of manufacturing the same
According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by...
US-9,780,226 Semiconductor device and manufacturing method thereof
Provided is a transistor with small parasitic capacitance or high frequency characteristics or a semiconductor device including the transistor. An oxide...
US-9,780,225 Semiconductor device and manufacturing method thereof
A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short...
US-9,780,223 Gallium arsenide based materials used in thin film transistor applications
Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide...
US-9,780,222 Semiconductor device
It is an object to provide a transistor having a new multigate structure in which operating characteristics and reliability are improved. In a transistor having...
US-9,780,221 Thin film transistor substrate comprising a photoresist layer formed between a first dielectric layer and an...
A thin film transistor array substrate includes a pixel electrode layout area, a data electrode layout area, a transparent pixel electrode layer formed in the...
US-9,780,220 Semiconductor device and method for manufacturing same
According to one embodiment, a semiconductor device includes an oxide semiconductor transistor. The oxide semiconductor transistor includes a semiconductor...
US-9,780,219 Semiconductor device and method for manufacturing semiconductor device
A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a...
US-9,780,218 Bottom-up epitaxy growth on air-gap buffer
A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The air gap...
US-9,780,217 Non-planar semiconductor device having self-aligned fin with top blocking layer
Non-planar semiconductor devices having self-aligned fins with top blocking layers and methods of fabricating non-planar semiconductor devices having...
US-9,780,216 Combination FinFET and methods of forming same
An embodiment fin field effect transistor (finFET) includes a fin extending upwards from a semiconductor substrate and a gate stack. The fin includes a channel...
US-9,780,215 Method for producing semiconductor device and semiconductor device
A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first...
US-9,780,214 Semiconductor device including Fin- FET and manufacturing method thereof
A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer...
US-9,780,213 Semiconductor device having a reversed T-shaped profile in the metal gate line-end
A method of fabricating a metal gate structure in a semiconductor device is disclosed. The method comprises removing a dummy poly gate, removing IL oxide and...
US-9,780,212 Fin width measurement using quantum well structure
A method for accurately electrically measuring a width of a fin of a FinFET, using a semiconductor fin quantum well structure is provided. The semiconductor fin...
US-9,780,211 Power cell and power cell circuit for a power amplifier
A power cell includes a fin over a substrate, the fin extending in a direction substantially perpendicular to a bottom surface of the substrate. The fin...
US-9,780,210 Backside semiconductor growth
An integrated circuit structure may include a transistor on a front-side semiconductor layer supported by an isolation layer. The transistor is a first...
US-9,780,209 Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a gate stack, at least one epitaxy structure, a dielectric material, and a contact. The gate stack is present on...
US-9,780,208 Method and structure of forming self-aligned RMG gate for VFET
An intermediate semiconductor structure in fabrication includes a silicon semiconductor substrate, a hard mask of silicon nitride (SiN) over the substrate and a...
US-9,780,207 Self-aligned high voltage LDMOS
Devices and methods for forming a device are disclosed. The method includes providing a crystalline-on-insulator substrate having a bulk substrate and a surface...
US-9,780,206 Methods of reducing the electrical and thermal resistance of SiC substrates and devices made thereby
A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate...
US-9,780,205 Insulated gate type semiconductor device having floating regions at bottom of trenches in cell region and...
A technique disclosed herein improves a voltage resistance of an insulated gate type semiconductor device. A provided method is a method for manufacturing an...
US-9,780,204 DMOS transistor with trench schottky diode
A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a...
US-9,780,203 Semiconductor device and manufacturing method thereof
A semiconductor device includes a first trench gate electrode and a second trench gate electrode which are electrically connected to a gate electrode, and a...
US-9,780,202 Trench IGBT with waved floating P-well electron injection
A trench IGBT includes a floating P well and a floating N+ well that extends down into the floating P well. A bottom surface of the floating P well has a novel...
US-9,780,201 Semiconductor device and manufacturing method of the same
To improve the electrical characteristics of a semiconductor device including an oxide semiconductor, and to provide a highly reliable semiconductor device with...
US-9,780,200 Semiconductor arrangement for a FinFET and method for manufacturing the same
A semiconductor arrangement and a method for manufacturing the same. An arrangement may include a bulk semiconductor substrate; a fin formed on the substrate; a...
US-9,780,199 Method for forming semiconductor device
A method of forming a semiconductor device includes following steps. Firstly, a gate structure is formed on a substrate, and two source/drain regions are...
US-9,780,198 Method for manufacturing high-performance and low-power field effect transistor of which surface roughness...
Aspects of the present invention relate to a method for manufacturing a high-performance and low-power field effect transistor (FET) element of which surface...
US-9,780,197 Method of controlling VFET channel length
Methods for making a vertical transistor and controlling channel length. A fin is formed over a semiconductor substrate. A bottom source/drain region is formed...
US-9,780,196 Method of forming a semiconductor device including forming a shield conductor overlying a gate conductor
In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of...
US-9,780,195 Non-volatile memory and fabricating method thereof
A non-volatile memory includes a substrate, a stacked structure, a channel layer, and a second dielectric layer. The stacked structure includes a first...
US-9,780,194 Vertical transistor structure with reduced parasitic gate capacitance
A method of forming a gate spacer in a vertical transistor includes depositing a gate spacer layer on a source layer and a sacrificial gate material on the gate...
US-9,780,193 Device with reinforced metal gate spacer and method of fabricating
A semiconductor device with reinforced gate spacers and a method of fabricating the same. The semiconductor device includes low-k dielectric gate spacers...
US-9,780,192 Fringe capacitance reduction for replacement gate CMOS
A replacement metal gate transistor structure and method with thin silicon nitride sidewalls and with little or no high-k dielectric on the vertical sidewalls...
US-9,780,191 Method of forming spacers for a gate of a transistor
The invention describes a method for forming spacers (152a, 152b) of a field effect transistor gate, comprising a step of forming a protection layer (152)...
US-9,780,190 InP-based transistor fabrication
Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer...
US-9,780,188 Vertical semiconductor power component capable of withstanding high voltage
A vertical power component includes a silicon substrate of a first conductivity type with a well of the second conductivity type on a lower surface of the...
US-9,780,187 Semiconductor device including an IGBT as a power transistor and a method of manufacturing the same
An improvement is achieved in the performance of a semiconductor device. Over the main surface of a semiconductor substrate for the n-type base of an IGBT, an...
US-9,780,186 Semiconductor ferroelectric storage transistor and method for manufacturing same
Provided is a ferroelectric field effect transistor (FeFET) which has a wide memory window even if the ferroelectric film thickness is 200 nm or less, and which...
US-9,780,185 Spacer chamfering gate stack scheme
A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are...
US-9,780,184 Electronic device with asymmetric gate strain
The use of strained gate electrodes in integrated circuits results in a transistor having improved carrier mobility, improved drive characteristics, and reduced...
US-9,780,183 Semiconductor devices having work function metal films and tuning materials
A semiconductor device includes a first transistor comprising a first dielectric film on a substrate and a first work function metal film of a first...
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