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Patent # Description
US-9,780,131 Image sensor having grid pattern
An image sensor may include a substrate having a photoelectric conversion element and a grid pattern formed over the substrate and having a flat upper surface,...
US-9,780,130 Image sensor and image processing system including the same
An image sensor is provided. The image sensor includes a first photoelectric conversion element and a second photoelectric conversion element, which are formed...
US-9,780,129 Sample-and-hold circuit having error compensation circuit portion
A sample-and-hold circuit having an error correction circuit portion that compensates for charge injection and noise. The error correction circuit portion...
US-9,780,128 Radiation image detecting device, radiation imaging system and operation method thereof
An image detector is disposed behind a grid. The image detector has normal pixels and measurement pixels. Out of a group of measurement pixels based on which an...
US-9,780,127 Liquid crystral display and manufacturing method thereof
A liquid crystal display includes: an insulation substrate; a thin film transistor including gate and data lines on the insulation substrate; a passivation...
US-9,780,126 Z-inversion type display device and method of manufacturing the same
The present invention provides a Z-inversion type display device comprising a gate line and a data line that intersect with each other to define a pixel area on...
US-9,780,125 Transistor substrate and display device
A transistor substrate includes a plurality of first transistors formed between a power supply wire and a first conductive wire, and a plurality of second...
US-9,780,124 Display device including pixel comprising first transistor second transistor and light-emitting element
An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions...
US-9,780,123 Display panel
A display panel includes a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of pixel units, a plurality of...
US-9,780,122 Array substrate, display panel and display device
An array substrate, a display panel and a display device are provided. The array substrate includes: a substrate, wherein a signal transmission line, a first...
US-9,780,121 Touch sensor, touch panel, and manufacturing method of touch panel
To provide a touch sensor including a transistor and a capacitor in which the transistor and the capacitor are electrically connected to each other, the...
US-9,780,120 Method for manufacturing array substrate, array substrate thereof and display device
The present disclosure provides a method for manufacturing an array substrate, an array substrate and a display device. The method includes: forming a gate...
US-9,780,119 Package cover plate for packaging a curved display panel having at least two curved portions, display panel and...
The present application discloses a package cover plate for packaging a curved display panel comprising at least two curved portions.
US-9,780,118 Display panel and a manufacturing method thereof
The invention discloses a display panel and a manufacturing method thereof, and the display panel comprises a first substrate and a second substrate disposing...
US-9,780,117 Semiconductor structure with active device and damaged region
A semiconductor structure is formed with an active layer having an active device including a body region. The active device is formed by top side processing in...
US-9,780,116 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and...
US-9,780,115 Three dimensional memory and methods of forming the same
Some embodiments include a memory device and methods of forming the memory device. One such memory device includes a first group of memory cells, each of the...
US-9,780,114 Semiconductor device with high integration
The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include...
US-9,780,113 Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure...
A method for fabricating a semiconductor device includes forming a stacked structure on a substrate, forming a first interlayer dielectric covering the stacked...
US-9,780,112 Methods and apparatus for three-dimensional NAND non-volatile memory devices with side source line and...
A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric...
US-9,780,111 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a substrate, a stacked body, a film having semi-conductivity or conductivity, and a memory film....
US-9,780,110 Memory having memory cell string and coupling components
Some embodiments include apparatuses and methods having a conductive line, a memory cell string including memory cells located in different levels the...
US-9,780,109 Semiconductor device
A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of...
US-9,780,108 Ultrathin semiconductor channel three-dimensional memory devices
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack...
US-9,780,107 Methods of forming integrated circuit devices
Methods of forming integrated circuit devices containing memory cells over a first region of a semiconductor substrate and gate structures over a second region...
US-9,780,106 Two-transistor non-volatile memory cell and related program and read methods
A memory device includes an N-channel transistor and a P-channel transistor. A word line is electrically connected to a drain terminal of the N-channel...
US-9,780,105 Semiconductor memory device including a plurality of columnar structures and a plurality of electrode films
A semiconductor memory device according to one embodiment, includes a stacked body including a plurality of electrode films stacked separated from each other...
US-9,780,104 Semiconductor memory device and method of manufacturing the same
An embodiment includes: a semiconductor substrate, a memory cell array region including a plurality of conductive layers connected to memory cells arranged in a...
US-9,780,103 Methods of forming integrated structures
Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has...
US-9,780,102 Memory cell pillar including source junction plug
Some embodiments include apparatuses and methods having a source material, a dielectric material over the source material, a select gate material over the...
US-9,780,101 Flash cell structure and method of fabricating the same
The present invention provides a flash cell structure and a method of fabricating the same. The flash cell structure includes a semiconductor substrate, a...
US-9,780,100 Vertical floating gate memory with variable channel doping profile
A method of forming a memory device that includes forming a sacrificial gate on a surface of a first source/drain region, and forming a channel opening through...
US-9,780,099 Layout pattern for static random access memory
A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a...
US-9,780,098 Integrated structure comprising neighboring transistors
An integrated structure includes a first MOS transistor with a first controllable gate region overlying a first gate dielectric and a second MOS transistor...
US-9,780,097 Dual-port SRAM devices and methods of manufacturing the same
A dual-port SRAM device includes a substrate having a field region and first to fourth active fins extending in a first direction, and a unit cell having first...
US-9,780,096 Vertical memory devices and methods of manufacturing the same
Vertical memory devices, and methods of manufacturing the same, include providing a substrate including a cell array region and a peripheral circuit region,...
US-9,780,095 Pattern forming method and semiconductor device manufacturing method using the same
A method for forming patterns includes forming an etch target layer; etching the etch target layer to form a pre-pattern having a line forming portion and a...
US-9,780,094 Trench to trench fin short mitigation
A semiconductor structure includes a replacement strap for a finFET fin that provides communication between a storage capacitor and the fin. The storage...
US-9,780,093 Semiconductor device
An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on...
US-9,780,092 Semiconductor device having a filling conductor comprising a plug portion and a cap portion and manufacturing...
A semiconductor device includes a semiconductor substrate and at least one gate stack. The gate stack is present on the semiconductor substrate, and the gate...
US-9,780,090 Integrated circuits and devices with interleaved transistor elements, and methods of their fabrication
A monolithic integrated circuit includes first and second pluralities of parallel-connected transistor elements (e.g., transistor fingers). To spread heat in...
US-9,780,089 Bipolar junction transistor layout
A bipolar junction transistor includes an emitter, a base contact, a collector and a shallow trench isolation. The base contact has two base fingers that form a...
US-9,780,088 Co-fabrication of vertical diodes and fin field effect transistors on the same substrate
A method of forming a vertical finFET and vertical diode device on the same substrate, including forming a channel layer stack on a heavily doped layer; forming...
US-9,780,087 Semiconductor device and formation method thereof
The present disclosure provides a semiconductor device and formation method thereof. A shallow trench isolation structure is formed in a semiconductor...
US-9,780,086 Field-effect transistor with integrated Schottky contact
A semiconductor device includes a semiconductor substrate defining a major surface. The device further includes a first region including at least a first pillar...
US-9,780,085 Electrostatic discharge protection apparatus
An electronic static discharge protection apparatus provided. A plurality of ESD circuits serially coupled between a pad and a internal circuit, a first stage...
US-9,780,084 Electrostatic discharge protection structure and fabrication method thereof
An electrostatic discharge protection structure includes: substrate of a first type of conductivity, well region of a second type of conductivity, substrate...
US-9,780,083 Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including...
An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells...
US-9,780,082 Semiconductor device, layout system, and standard cell library
A semiconductor device includes a substrate, a first transistor gated by an inverted voltage level of a first input signal to pull up a first node, a second...
US-9,780,081 Chip package structure and manufacturing method therefor
A chip package structure can include: a lead frame having a carrier substrate and a first lead around the carrier substrate; a first conductive post arranged on...
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