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Patent # Description
US-9,779,978 Method of manufacturing semiconductor device and semiconductor manufacturing apparatus
A method of manufacturing a semiconductor device uses a semiconductor manufacturing apparatus including a turn table allowing placement of at least first and...
US-9,779,977 End effector assembly for clean/dirty substrate handling
An end effector includes first, second, third, fourth, fifth, sixth, and seventh substrate support pads. A method of handling a substrate with the end effector...
US-9,779,976 Adhesive sheet, method for manufacturing semiconductor device using same, method for manufacturing thermal...
Provided is a thermal type airflow volume meter improving measurement accuracy, a method for manufacturing the same, and an adhesive sheet for use therein, the...
US-9,779,975 Electrostatic carrier for thin substrate handling
Embodiments provided herein generally relate to an electrostatic chuck (ESC). The ESC may comprise a reduced number of stress initiation points, such as holes...
US-9,779,974 System and method for reducing temperature transition in an electrostatic chuck
A system for controlling a substrate temperature in a substrate processing system includes a substrate support device, a controller, a temperature sensor, and a...
US-9,779,973 Purging device and purging method
The safety of a worker is ensured, and the area in which purging is halted is limited to the minimum. The inner space of a device is divided into a working area...
US-9,779,972 Method and device for controlling the manufacture of semiconductor by measuring contamination
A device for handling substrates within a semiconductor manufacturing plant having substrate processing equipments, substrate storage means, substrate transport...
US-9,779,971 Methods and apparatus for rapidly cooling a substrate
Embodiments of methods and apparatus for rapidly cooling a substrate are provided herein. In some embodiments, a cooling chamber for cooling a substrate...
US-9,779,970 Heater supporting device
A heater supporting device for use in a semiconductor manufacturing apparatus is provided so as to improve the uniformity of a temperature property and the...
US-9,779,969 Package structure and manufacturing method
A package structure and a manufacturing method are provided. The package structure includes a semiconductor substrate and a first conductive feature over the...
US-9,779,968 Method for processing semiconductor substrate and method for manufacturing semiconductor device in which said...
Provided are a method of processing a semiconductor substrate and a method of manufacturing a semiconductor device that uses this method of processing. The...
US-9,779,967 Ultra-thin power transistor and synchronous buck converter having customized footprint
A power field-effect transistor package is fabricated. A leadframe including a flat plate and a coplanar flat strip spaced from the plate is provided. The plate...
US-9,779,966 Lead frame and semiconductor device
A lead frame includes a dam bar and leads connected by the dam bar. Each lead includes an inner lead, which is located at one side of the dam bar, and an outer...
US-9,779,965 Systems and methods for bonding semiconductor elements
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first...
US-9,779,964 Thermal processing method for wafer
The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a gas mixture comprising oxygen gas and...
US-9,779,963 Method of fabricating a semiconductor structure
A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first...
US-9,779,962 Plasma etching method
A plasma etching method is provided to perform a desired etching by switching a process condition while maintaining plasma by supplying high frequency power. A...
US-9,779,961 Etching method
Disclosed is a method for etching a first region including a multi-layer film formed by providing silicon oxide films and silicon nitride films alternately, and...
US-9,779,960 Hybrid fin cutting processes for FinFET semiconductor devices
One illustrative method disclosed herein includes, among other things, forming a fin-removal masking layer comprised of a plurality of line-type features, each...
US-9,779,959 Structure and formation method of semiconductor device structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a...
US-9,779,958 Method of, and apparatus for, forming hard mask
A method of forming a hard mask includes depositing step for depositing a titanium nitride film on a surface of a to-be-processed object; adsorbing step for...
US-9,779,957 Method of manufacturing independent depth-controlled shallow trench isolation
A method of manufacturing a semiconductor structure. A patterned first hard mask is formed on a substrate. The patterned first hard mask includes first trench...
US-9,779,956 Hydrogen activated atomic layer etching
A method for selectively etching SiO and SiN with respect to SiGe or Si of a structure is provided. A plurality of cycles of atomic layer etching is provided,...
US-9,779,955 Ion beam etching utilizing cryogenic wafer temperatures
The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while...
US-9,779,954 Method for etching silicon layer and plasma processing apparatus
Disclosed is a method of etching a silicon layer by removing an oxide film formed on a workpiece which includes the silicon layer and a mask provided on the...
US-9,779,953 Electromagnetic dipole for plasma density tuning in a substrate processing chamber
Methods and apparatus for plasma-enhanced substrate processing are provided herein. In some embodiments, an apparatus for processing a substrate includes: a...
US-9,779,952 Method for laterally trimming a hardmask
Techniques herein include methods for controllable lateral etching of dielectrics in polymerizing fluorocarbon plasmas. Methods can include dielectric stack...
US-9,779,951 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes: forming a first major electrode on a first major surface of a semiconductor substrate; forming a...
US-9,779,950 Ruthenium film forming method, film forming apparatus, and semiconductor device manufacturing method
A ruthenium film forming method includes a deposition process of introducing a mixed gas of a ruthenium carbonyl gas and a CO gas into a processing vessel 1 by...
US-9,779,949 Array substrate, display device, and manufacturing method of array substrate
An array substrate is provided, wherein a pixel electrode has the same material as a source/drain and has a thickness less than that of the source/drain, or a...
US-9,779,948 Method of fabricating 3D NAND
Disclosed herein are methods of fabricating a source side select (SGS) transistor in 3D memory. The threshold voltage of the SGS transistor accurately meets a...
US-9,779,947 Self-aligned insulated film for high-k metal gate device
An integrated circuit includes a semiconductor substrate, a gate dielectric over the substrate, a metal gate structure over the semiconductor substrate and the...
US-9,779,946 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in...
US-9,779,945 Method and apparatus for irradiating a semiconductor material surface by laser energy
An apparatus for irradiating semiconductor material is disclosed having, a laser generating a primary laser beam, an optical system and a means for shaping the...
US-9,779,944 Method and structure for cut material selection
A method for manufacturing a semiconductor device includes forming a plurality of mandrels on a dielectric layer, conformally depositing a spacer layer on the...
US-9,779,943 Compensating for lithographic limitations in fabricating semiconductor interconnect structures
A hard mask is formed into lines and bridges two adjacent lines using mandrels, spacers for the mandrels and a lithographic process for each bridge to create a...
US-9,779,942 Method of forming patterned mask layer
A method of forming a patterned mask layer includes the following steps. A plurality of support features is formed on a mask layer. A plurality of spacers is...
US-9,779,941 Methods of forming patterns of semiconductor devices
In a method of forming patterns of a semiconductor device, an object layer is formed on a substrate. A plurality of guiding pillars and at least one guiding dam...
US-9,779,940 Chip package
An embedded die package comprising a die having die contract pads in a passivation layer, the die contact pads being coupled to a first side of a feature layer...
US-9,779,938 Metal oxide thin film, method of producing same, and coating solution for forming metal oxide thin film used in...
A metal oxide thin film according to the present invention has a peak which is attributed to 1s electrons of nitrogen in a binding energy range of 402 eV to 405...
US-9,779,937 Manufacturing method of semiconductor device
One object is to have stable electrical characteristics and high reliability and to manufacture a semiconductor device including a semi-conductive oxide film....
US-9,779,936 Plasma processing method and plasma processing apparatus
Disclosed is a plasma processing method including: growing a polycrystalline silicon layer on a processing target base body; and exposing the polycrystalline...
US-9,779,935 Semiconductor substrate with stress relief regions
A crystalline base substrate including a first semiconductor material and having a main surface is provided. The base substrate is processed so as to damage a...
US-9,779,934 Nitride semiconductor free-standing substrate, method of manufacturing the same and nitride semiconductor device
A nitride semiconductor free-standing substrate includes a diameter of not less than 40 mm, a thickness of not less than 100 .mu.m, a dislocation density of not...
US-9,779,933 Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a...
US-9,779,932 Sacrificial layer for post-laser debris removal systems
A method of removing post-laser debris from a wafer includes, for an embodiment, forming a sacrificial layer over a layer to be patterned, patterning the...
US-9,779,931 Method of manufacturing semiconductor wafers and method of manufacturing a semiconductor device
An embodiment of a method of manufacturing semiconductor wafers comprises determining at least one material characteristic for at least two positions of a...
US-9,779,930 Multiplexed electrostatic linear ion trap
Systems and methods are provided for performing multiplex electrostatic linear ion trap mass spectrometry. A first beam of ions is received and the first beam...
US-9,779,929 Method of screening a sample for the presence of one or more known compounds of interest and a mass...
A method of screening a sample for the presence of one or more known compounds of interest is disclosed. A fragmentation device is repeatedly switched between a...
US-9,779,928 Vacuum pump and mass spectrometer
A vacuum pump comprises: a first pump stage; a second pump stage provided downstream of the first pump stage; a first suction port provided on a suction side of...
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