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Patent # Description
US-9,786,528 Substrate supporting table, substrate processing apparatus, and manufacture method for semiconductor device
The substrate supporting table includes a supporting plate that supports a substrate, a peripheral wall that encompasses a flow path of a coolant under the...
US-9,786,527 Substrate processing device and substrate processing method for carrying out chemical treatment for substrate
It is an object to reduce a chemical treating width in a peripheral edge part of a substrate while suppressing deterioration in each of uniformity of the...
US-9,786,526 Selectivity in a xenon difluoride etch process
A method and an apparatus for etching microstructures and the like that provides improved selectivity to surrounding materials when etching silicon using xenon...
US-9,786,525 Apparatus for processing semiconductor wafers, in particular for carrying out a polymers removal process step
An apparatus for processing semiconductor wafers includes at least a wet bench and an automatic handling system of a wafer carrier removably connected thereto....
US-9,786,524 Developing unit with multi-switch exhaust control for defect reduction
The present disclosure provides a developing unit that includes a wafer stage designed to secure a semiconductor wafer; an exhaust mechanism configured around...
US-9,786,523 Method and apparatus for substrate rinsing and drying
A method and apparatus are disclosed for optimizing a rinsing and drying process in semiconductor manufacturing. The optimization seeks to maximize processing...
US-9,786,522 Substrate treatment method and substrate treatment apparatus
A substrate treatment method is performed by a substrate treatment apparatus including a substrate holding unit which holds a substrate, and a hot plate which...
US-9,786,521 Chip package method for reducing chip leakage current
A chip package method can include: forming bonding pins on a first region of a first surface of a carrier; forming an insulating layer on an inactive face of a...
US-9,786,520 Semiconductor device and manufacturing method thereof
Some embodiments of the present disclosure provide a method of manufacturing a device. The method includes providing a carrier, the carrier including a top...
US-9,786,519 Packaged semiconductor devices and methods of packaging semiconductor devices
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an...
US-9,786,518 System and method for manufacturing a cavity down fabricated carrier
A method of fabricating a receptacle down BGA carrier having a top surface and a bottom surface, the method comprising combining a conductive portion and a...
US-9,786,517 Ablation method and recipe for wafer level underfill material patterning and removal
Introducing an underfill material over contact pads on a surface of an integrated circuit substrate; and ablating the introduced underfill material to expose an...
US-9,786,516 Power device having reduced thickness
An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with...
US-9,786,515 Semiconductor device package and methods of manufacture thereof
A semiconductor device package and method of manufacturing is provided. An interconnect pre-assembly includes a first frame having a plurality of first signal...
US-9,786,514 Semiconductor package with sidewall-protected RDL interposer
A semiconductor package includes a redistribution layer (RDL) interposer having a first side, a second side opposite to the first side, and a vertical sidewall...
US-9,786,513 Manufacturing method for semiconductor device including first and second thermal treatments
In a manufacturing method for a semiconductor device according to an embodiment, a first heat treatment to anneal or oxidize an SiC layer in an atmosphere where...
US-9,786,512 Etching method
Provided is an etching method for simultaneously etching first and second regions of a workpiece. The first region has a multilayered film configured by...
US-9,786,511 Sequential infiltration synthesis for advanced lithography
A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified...
US-9,786,510 Fin-shaped structure and manufacturing method thereof
A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second...
US-9,786,509 Wafer processing method
A wafer processing method includes a first grinding step and a second grinding step. In the first grinding step, first grinding abrasives are moved in a...
US-9,786,508 Semiconductor device and fabrication method thereof
The present disclosure provides semiconductor devices and fabrication methods thereof. A work function layer is formed on the semiconductor substrate. A buffer...
US-9,786,507 Methods of forming field effect transistors using a gate cut process following final gate formation
Disclosed are field effect transistor (FET) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate...
US-9,786,506 Array substrate, manufacturing method therefor and display device
Provided is a manufacturing method for an array substrate, which relates to the technical field of displaying and comprises the steps of: S1: forming a pattern...
US-9,786,505 FinFET device using dummy fins for smooth profiling
A semiconductor structure includes a substrate, at least one active semiconductor fin, at least one insulating structure, a gate electrode, and a gate...
US-9,786,504 Method for forming a patterned layer
A method for forming a patterned layer is provided. The method comprises forming a first material layer over a first substrate, forming a photoresist layer on...
US-9,786,503 Method for increasing pattern density in self-aligned patterning schemes without using hard masks
Provided is a method for increasing pattern density of a structure using an integration scheme and perform pitch splitting at the resist level without the use...
US-9,786,502 Method for forming fin structures for non-planar semiconductor device
A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the...
US-9,786,501 Photoresist film placing method, semiconductor device manufacturing method, electro-optical device, and...
A method for placing a resist film of a region having a small film thickness with good shape accuracy is provided. The method has processes of placing a...
US-9,786,500 Polycrystalline semiconductor layer and fabricating method thereof
The present application discloses a method of fabricating a polycrystalline semiconductor layer, comprising forming a heat storage layer; forming a buffer layer...
US-9,786,499 Method of manufacturing a substrate having a crystallized layer and a laser crystallizing apparatus for the same
A method of manufacturing a substrate includes: irradiating, along a first path, a laser beam emitted from a source onto a substrate, wherein the substrate...
US-9,786,498 Method for the production of a nitride compound semiconductor layer
Described is a method for producing a nitride compound semiconductor layer, involving the steps of:--depositing a first seed layer (1) comprising a nitride...
US-9,786,497 Double aspect ratio trapping
A semiconductor structure is provided by a process in which two aspect ratio trapping processes are employed. The structure includes a semiconductor substrate...
US-9,786,496 Method of densifying films in semiconductor device
Methods of densifying films, cross-linking films, and controlling the stress of films are provided herein. Methods include forming a removable film on a...
US-9,786,495 Method for evaluating semiconductor film and method for manufacturing semiconductor device
A method for evaluating a semiconductor film of a semiconductor device which is configured to include an insulating film, the semiconductor film, and a...
US-9,786,494 Film formation method and film formation apparatus
Disclosed is a film formation method, including vaporizing a plurality of raw material monomers in respective corresponding vaporizers, supplying the plurality...
US-9,786,493 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A semiconductor device manufacturing method, including: mounting substrates on a mounting table within a processing chamber along a rotation direction of the...
US-9,786,492 Formation of SiOCN thin films
Methods for depositing silicon oxycarbonitride (SiOCN) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma...
US-9,786,491 Formation of SiOCN thin films
Methods for depositing silicon oxycarbonitride (SiOCN) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma...
US-9,786,490 Wafer processing method and electronic device
Disclosed herein is a wafer processing method for processing the back side of a wafer having a plurality of devices formed on the front side so as to be...
US-9,786,489 Method of cleaning post-etch residues on a copper line
A method of cleaning post-etch residues on a copper line includes providing a copper line which is divided into a first region and a second region. A dielectric...
US-9,786,488 Liquid processing method, memory medium and liquid processing apparatus
A liquid processing method for liquid-processing a substrate includes setting a substrate on a substrate holding device which rotates the substrate such that...
US-9,786,487 Method for coating cavities of semiconductor substrates
A method for temporary coating of cavities, which at least partially run through a semiconductor substrate and are provided for a permanent coating and/or...
US-9,786,486 Parallel multi wafer axial spin clean processing using spin cassette inside movable process chamber
A system and method concurrently processes multiple wafers. A cassette structure includes multiple chucks and a drive spool for supporting and rotating the...
US-9,786,485 Mass analyser
A mass analyser comprises a pair of electrode arrays. Each array has a set of focusing electrodes which are supplied, in use, with voltage to create an...
US-9,786,484 Method and apparatus for decoding multiplexed information in a chromatographic system
Implementations of methods and apparatuses are disclosed for decoding multiplexed information in a chromatographic system. Implementations may include the...
US-9,786,483 Detection of ions in an ion trap
An ion trap such as an ion cyclotron resonance analyzer cell (trap) is described wherein the ion trap comprises a plurality of electrodes and has at least one...
US-9,786,482 Ion trap mass spectrometer
A mass spectrometer including an ion source, an ion guide, a pulsed converter, and an electrostatic analyzer is disclosed, along with a method of mass...
US-9,786,481 Automated cleanliness diagnostic for mass spectrometer
A mass spectrometer or ion mobility spectrometer is disclosed comprising means for detecting a blockage in an inlet orifice arranged between an ion source and a...
US-9,786,480 Analytical apparatus utilizing electron impact ionization
An analytical apparatus for mass spectrometry comprises an electron impact ionizer including an electron emitter and an ionization target zone. The target zone...
US-9,786,479 Mass spectrometer device and method using scanned phase applied potentials in ion guidance
An ion guide or mass analyser is disclosed comprising a plurality of electrodes having apertures through which ions are transmitted in use. A pseudo-potential...
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