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Patent # Description
US-9,799,787 Solar cell, concentrator photovoltaic unit, concentrator photovoltaic module, and method for producing...
Provided is a solar cell for which accurate mutual alignment between a condenser lens and a power generating element corresponding thereto can be performed. In...
US-9,799,786 Support frame and photovoltaic power generation system including the same
A support frame is for a photovoltaic power generation system. The support frame includes a frame member including a first portion positioned at one surface of...
US-9,799,785 Unipolar barrier dual-band infrared detectors
Dual-band barrier infrared detectors having structures configured to reduce spectral crosstalk between spectral bands and/or enhance quantum efficiency, and...
US-9,799,784 High efficiency photovoltaic device employing cadmium sulfide telluride and method of manufacture
A photovoltaic device is disclosed including at least one Cadmium Sulfide Telluride (CdS.sub.xTe.sub.1-x) layer as are methods of forming such a photovoltaic...
US-9,799,783 Dopant ink composition and method of fabricating a solar cell there from
Dopant ink compositions and methods of fabricating solar cells there from are described. A dopant ink composition may include a cross-linkable matrix precursor,...
US-9,799,782 Solar cell module and method for manufacturing the same
A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes a first solar cell and a second solar cell each...
US-9,799,781 Solar cell
A solar cell is discussed. The solar cell according to an embodiment includes a photoelectric conversion unit including a first conductive type region and a...
US-9,799,780 Solar cell and manufacture method thereof
A solar cell is provided, including a substrate, a doped emitter layer, a composite anti-reflective layer, a first electrode, a second electrode, a third...
US-9,799,779 Systems and methods for photovoltaic string protection
A system and method includes a circuit for protecting a photovoltaic string. A bypass switch connects in parallel to the photovoltaic string and a hot spot...
US-9,799,778 Chip package having a trench exposed protruding conductive pad
A chip package includes a chip, an insulating layer, a flowing insulating material layer and conductive layer. The chip has a conductive pad, a side surface, a...
US-9,799,777 Floating gate memory in a channel last vertical FET flow
A floating gate memory cell is provided on a surface of a base semiconductor substrate utilizing a vertical FET processing flow. The floating gate memory cell...
US-9,799,776 Semi-floating gate FET
A semi-floating gate transistor is implemented as a vertical FET built on a silicon substrate, wherein the source, drain, and channel are vertically aligned, on...
US-9,799,775 Semiconductor device
A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode,...
US-9,799,774 Switch circuit, semiconductor device, and system
A switch circuit that can control an electrical connection state without additionally providing a control circuit is provided. The switch circuit includes a...
US-9,799,773 Transistor and semiconductor device
A transistor which withstands a high voltage and controls large electric power can be provided. A transistor is provided which includes a gate electrode, a gate...
US-9,799,772 Thin film transistor device, method for manufacturing same and display device
A TFT device including: a gate electrode; a channel layer above the gate electrode; a channel protection layer on the channel layer; an electrode pair on the...
US-9,799,771 FinFET and method for manufacturing the same
Methods for manufacturing a FinFET and a FinFET are provided. In various embodiments, the method for manufacturing a FinFET includes etching a base substrate to...
US-9,799,770 FinFET structure device
The present invention provides a FinFET device, including at least one fin structure, wherein the fin structure has a first-type well region, and a second-type...
US-9,799,769 Semiconductor device and method for fabricating the same
A semiconductor device includes: a substrate having a first fin-shaped structure and a second fin-shaped structure thereon, a shallow trench isolation (STI)...
US-9,799,768 Semiconductor device and method for manufacturing same
A semiconductor device includes: a sidewall insulating film; a gate electrode; source and drain regions; a first stress film; and a second stress film.
US-9,799,767 Methods of forming PMOS and NMOS FinFET devices on CMOS based integrated circuit products
One illustrative method disclosed herein includes, among other things, forming first and second fins, respectively, for a PMOS device and an NMOS device, each...
US-9,799,766 High voltage transistor structure and method
A high voltage transistor structure comprises a first double diffused region and a second double diffused region formed in a first well of a substrate, wherein...
US-9,799,765 Formation of a bottom source-drain for vertical field-effect transistors
In an embodiment, this invention relates to a vertical field-effect transistor component including a bottom source-drain layer and a method of creating the...
US-9,799,764 Lateral power integrated devices having low on-resistance
A lateral power integrated device includes a source region and a drain region disposed in a semiconductor layer and spaced apart from each other in a first...
US-9,799,763 Method and structure for reducing switching power losses
One embodiment is directed towards a method. The method includes forming a drift region of a first conductivity type above or in a substrate. The substrate has...
US-9,799,762 Semiconductor device and method of manufacturing a semiconductor device
A semiconductor device comprises a transistor formed in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain...
US-9,799,761 3DIC based system with memory cells and transistors
A 3D IC based system, the system including: a first layer including first memory cells including first transistors, where the first transistors include first...
US-9,799,760 Semiconductor device with selectively etched surface passivation
A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor...
US-9,799,759 Techniques for forming non-planar germanium quantum well devices
Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV...
US-9,799,758 Semiconductor device and semiconductor device manufacturing method
A semiconductor device and manufacturing method achieve miniaturization, prevent rise in threshold voltage and on-state voltage, and prevent decrease in...
US-9,799,757 PN junction chemical sensor
A sensor device (100, 2800) for detecting particles, the sensor device (100, 2800) comprising a substrate (102), a first doped region (104) formed in the...
US-9,799,756 Germanium lateral bipolar transistor with silicon passivation
Semiconductor structure including germanium-on-insulator lateral bipolar junction transistors and methods of fabricating the same generally include formation of...
US-9,799,755 Method for manufacturing memory device and method for manufacturing shallow trench isolation
A method for manufacturing a memory device includes forming trenches in a substrate to define an active region, filling an insulation material in the trenches,...
US-9,799,754 Contact structure and extension formation for III-V nFET
FinFET devices including III-V fin structures and silicon-based source/drain regions are formed on a semiconductor substrate. Silicon is diffused into the III-V...
US-9,799,753 FinFET having isolation structure and method of forming the same
A transistor includes a substrate having an upper surface, a fin structure protruding from the upper surface of the substrate, an isolation structure over the...
US-9,799,752 Method for forming a thin-film transistor
A method of forming a thin-film transistor includes providing a substrate having a top surface and a recess in the top surface. An electrically conductive gate...
US-9,799,751 Methods of forming a gate structure on a vertical transistor device
One illustrative method disclosed herein includes forming a multi-layered sidewall spacer (MLSS) around a vertically oriented channel semiconductor structure,...
US-9,799,750 Semiconductor device and fabrication method thereof
A semiconductor device and a method for fabricating the semiconductor device are disclosed. An isolation structure is formed in a substrate and a gate stack is...
US-9,799,748 Method of forming inner spacers on a nano-sheet/wire device
A method includes forming a stack of semiconductor material layers above a substrate. The stack includes at least one first semiconductor material layer and at...
US-9,799,747 Low resistance contact for semiconductor devices
A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type material is formed on or in the...
US-9,799,746 Preventing leakage inside air-gap spacer during contact formation
Techniques for preventing leakage of contact material into air-gap spacers during contact formation. For example, a method comprises forming a contact trench on...
US-9,799,745 Atomic layer deposition methods and structures thereof
A method and structure for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a...
US-9,799,744 TFT array substrate, method of manufacturing the same and display device
A method of manufacturing the TFT array substrate includes steps of: forming a first electrically conductive layer on the substrate, the first electrically...
US-9,799,743 Trenched power semiconductor element
A trenched power semiconductor element, a trenched-gate structure thereof being in an element trench of an epitaxial layer and including at least a shielding...
US-9,799,742 Field effect transistor having electrode coated sequentially by oxide layer and nitride layer and method for...
A field effect transistor includes a substrate, an epitaxial layer, a remnant-oxide layer, an electrode, a surrounding-oxide layer, a surrounding-nitride layer,...
US-9,799,741 Semiconductor device and method for manufacturing the same
A semiconductor device having a composite barrier structure over a transistor and a method for manufacturing the same is disclosed. The method includes a series...
US-9,799,740 Thin film transistor and thin film transistor substrate including the same
A thin film transistor substrate includes: a substrate; and a thin film transistor including a gate electrode on the substrate, an active layer on the gate...
US-9,799,739 Semiconductor device having air gap and method for manufacturing the same, memory cell having the same and...
A semiconductor device including a semiconductor substrate including a plurality of active regions and a device isolation region for isolating the plurality of...
US-9,799,738 Semiconductor device with field electrode and contact structure
A semiconductor device includes a field electrode structure with a field electrode and a field dielectric surrounding the field electrode. A semiconductor body...
US-9,799,737 Method for forming group III/V conformal layers on silicon substrates
A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method...
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