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Patent # Description
US-9,812,362 Wafer processing method
Disclosed herein is a wafer processing method including a cover plate providing step of providing a cover plate on the front side of a wafer to thereby form a...
US-9,812,361 Combination grinding after laser (GAL) and laser on-off function to increase die strength
Consistent with an example embodiment, there is a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active...
US-9,812,360 Systems and methods for producing flat surfaces in interconnect structures
In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect...
US-9,812,359 Thru-silicon-via structures
Stress generation free thru-silicon-via structures with improved performance and reliability and methods of manufacture are provided. The method includes...
US-9,812,358 FinFET structures and methods of forming the same
FinFET structures and methods of forming the same are disclosed. In a method, a recess is formed exposing a plurality of semiconductor fins on a wafer. A dummy...
US-9,812,357 Self-limiting silicide in highly scaled fin technology
A method of forming a metal semiconductor alloy on a fin structure that includes forming a semiconductor material layer of a polycrystalline crystal structure...
US-9,812,356 Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes generating a layout including a first conductive pattern region and a second conductive pattern...
US-9,812,355 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes providing a substrate having an insulating film and a plurality of conductive films on a surface;...
US-9,812,354 Process of forming an electronic device including a material defining a void
An electronic device can include one or more trenches that include a material that defines one or more voids. In an embodiment, the substrate defines a first...
US-9,812,353 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device includes forming grooves in a first dielectric layer on a substrate, the first dielectric layer including a...
US-9,812,351 Interconnection cells having variable width metal lines and fully-self aligned continuity cuts
A method includes patterning a 1.sup.st mandrel cell into a 1.sup.st mandrel layer disposed above a dielectric layer of a semiconductor structure. The 1.sup.st...
US-9,812,350 Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer
A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a polymer substrate and an interfacial layer over...
US-9,812,349 Control of the incidence angle of an ion beam on a substrate
One system includes a chamber, a chuck assembly, and an ion source. The chuck assembly includes a substrate support and a precession assembly with a center...
US-9,812,348 Member peeling method, member processing method, and method for manufacturing semiconductor chip
A member peeling method includes a step for preparing a first member having a first main face and an outer edge thereof and a second member having a second main...
US-9,812,347 Semiconductor device and method
Disclosed herein is a semiconductor device that includes a semiconductor die and a substrate including a first surface and a second surface. The substrate...
US-9,812,346 Semiconductor wafer device and manufacturing method thereof
A method of manufacturing a semiconductor device comprises providing a carrier, disposing a plurality of dies over the carrier along a first direction and a...
US-9,812,345 Composite substrate, semiconductor device, and method for manufacturing semiconductor device
A composite substrate 10 includes a semiconductor substrate 12 and an insulating support substrate 14 that are laminated together. The support substrate 14...
US-9,812,344 Wafer processing system with chuck assembly maintenance module
A wafer processing system has a ring maintenance module for loading wafers into a chuck assembly, and for cleaning and inspecting the chuck assembly used in...
US-9,812,343 Load station
A substrate loading station including a frame forming a chamber configured to hold a controlled environment, a transfer robot connected to the frame and one or...
US-9,812,342 Reduced wire count heater array block
A thermal system includes a plurality of thermal elements. In one form, each of the thermal elements define a resistor and a current limiting device. The...
US-9,812,341 Rare-earth oxide based coatings based on ion assisted deposition
A component for a semiconductor processing chamber includes a ceramic body having at least one surface with a first average surface roughness of approximately...
US-9,812,340 Method of fabricating semiconductor package having semiconductor element
A method of fabricating a semiconductor package is provided, including: disposing a plurality of semiconductor elements on a carrier through an adhesive layer...
US-9,812,339 Method of assembling semiconductor devices of varying thicknesses
A method of packaging a semiconductor die includes the steps of mounting the semiconductor die on a carrier, electrically connecting electrical contact pads of...
US-9,812,338 Encapsulation of advanced devices using novel PECVD and ALD schemes
Embodiments of a multi-layer environmental barrier for a semiconductor device and methods of manufacturing the same are disclosed. In one embodiment, a...
US-9,812,337 Integrated circuit package pad and methods of forming
A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias...
US-9,812,336 FinFET semiconductor structures and methods of fabricating same
The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor...
US-9,812,335 Method of forming fine pattern of semiconductor device
A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target...
US-9,812,334 Corrosion method of passivation layer of silicon wafer
A corrosion method of a passivation layer (320) of a silicon wafer (300) includes: pouring hydrofluoric acid solution (100) into a container (200) with an open...
US-9,812,333 Nanoscale patterning method and integrated device for electronic apparatus manufactured therefrom
Provided is a nanoscale patterning method using self-assembly, wherein nanoscale patterns having desirable shapes such as a lamella shape, a cylinder shape, and...
US-9,812,332 Etching methods and methods of manufacturing semiconductor devices using the same
An etching method is disclosed. The etching method comprises providing on a substrate a structure comprising a recess region formed therein. The recess region...
US-9,812,331 Apparatus for and method of processing substrate
Provided are an apparatus for and a method of processing a substrate. The substrate processing apparatus includes a substrate processing unit to process a...
US-9,812,330 Formulations for producing indium oxide-containing layers, process for producing them and their use
The present invention relates to liquid formulations which can be produced by dissolving at least one indium alkoxide compound which can be prepared by reacting...
US-9,812,329 Method of fabricating a semiconductor device
There is provides a method of fabricating a semiconductor device to decrease contact resistance of source/drain regions and gate electrodes and thereby improve...
US-9,812,328 Methods for forming low resistivity interconnects
Embodiments described herein generally relate to methods for forming silicide materials. Silicide materials formed according to the embodiments described herein...
US-9,812,327 Semiconductor device and method of forming the same
Provided is a memory device including a first gate, a second gate and an inter-gate dielectric layer. The first gate is buried in a substrate. The second gate...
US-9,812,326 Semiconductor device, related manufacturing method, and related electronic device
A method for manufacturing a semiconductor device may include the following steps: preparing a first substrate; providing a first conductor, which is configured...
US-9,812,325 Method for modifying spacer profile
Techniques herein provide a process to reform or flatten asymmetric spacers to form a square profile which creates symmetric spacers for accurate pattern...
US-9,812,324 Methods to control fin tip placement
A method includes providing a semiconductor structure having a substrate including a longitudinally extending plurality of fins formed thereon. A target layout...
US-9,812,323 Low external resistance channels in III-V semiconductor devices
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a replacement channel composed of a...
US-9,812,322 Sapphire substrate with patterned structure
A sapphire substrate with patterned structure includes a sapphire base; a plurality of the cavities formed on a surface of the sapphire base; and a template...
US-9,812,321 Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure
A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate...
US-9,812,320 Method and apparatus for filling a gap
According to the invention there is provided a method of filling one or more gaps created during manufacturing of a feature on a substrate by providing a...
US-9,812,319 Method for forming film filled in trench without seam or void
A method for forming a film filled in a trench of a substrate without seam or void includes: depositing a conformal SiN film in a trench of a substrate placed...
US-9,812,318 Low temperature molecular layer deposition of SiCON
Methods for the deposition of a SiCON film by molecular layer deposition using a multi-functional amine and a silicon containing precursor having a reactive...
US-9,812,317 Semiconductor device and method of manufacturing the same
In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become...
US-9,812,316 Mixed material, method for producing same, and organic element using same
A mixed material for vapor deposition of lithium contains lithium oxide M1 in an amount of 90% or more, sodium chloride (at least one material selected from...
US-9,812,315 Treating solution for electronic parts, and process for producing electronic parts
The invention provides an aqueous solution capable of selectively protecting a nitrogen-containing silicon compound from corrosion by a treating solution for...
US-9,812,314 Lamp
The invention relates to a lamp (1) comprising a light source (2) that can be excited by microwaves to provide illumination and a housing (4) surrounding the...
US-9,812,313 Time-of-flight analysis of a continuous beam of ions by a detector array
Systems and methods are provided for time-of-flight analysis of a continuous beam of ions by a detector array. A sample is ionized using an ion source to...
US-9,812,312 Systems and methods for bubble based ion sources
The present disclosure describes embodiments directed to a bubble based ion source system comprising an ion source configured to generate a plurality of ions, a...
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