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Patent # Description
US-9,812,209 System and method for memory integrated circuit chip write abort indication
Systems and methods for detecting a command execution abort are disclosed. Power failure may abort the writing of data in a memory device prematurely, resulting...
US-9,812,208 System and method for employing secure non-volatile storage devices in gaming machines
A write-protection system and method for use with a gaming machine. The system having a non-volatile data storage device, an interface device and an...
US-9,812,207 Semiconductor memory device
A memory device includes a first string and a second string. The first string includes first and second transistors and first cell transistors coupled in series...
US-9,812,206 3D flash memory device having different dummy word lines and data storage devices including same
A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy...
US-9,812,205 MTJ-based content addressable memory with measured resistance across matchlines
Embodiments of the subject invention provide a three transistor, two domain-wall-based magnetic tunnel junction CAM cell (3T-2DW-MTJ CAM). A four transistor,...
US-9,812,204 Ferroelectric memory cell without a plate line
A ferroelectric static random access memory (FeSRAM) cell includes (a) first and second cross-coupled inverters connected between a power supply voltage signal...
US-9,812,203 Semiconductor memory having both volatile and non-volatile functionality including resistance change material...
Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein...
US-9,812,202 Three dimensional opto-magnetic data storage system and method
The present invention relates to a data storage system and a method which has high storing capacity and high data access rate and low power consumption. The...
US-9,812,201 Electronic device including variable resistance element and method for operating the same
A method for operating an electronic device including a variable resistance element comprises performing a reset operation on the variable resistance element....
US-9,812,200 Concurrent read and write operations in a serial flash device
A method of controlling an NVM device can include: (i) receiving, by an interface, a write command from a host; (ii) beginning execution of a write operation on...
US-9,812,199 Electronic device with semiconductor memory having variable resistance elements for storing data and associated...
Provided are, among others, memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic...
US-9,812,198 Fast sense amplifier with bit-line pre-charging
A bit-line of a resistive memory cell includes a reference branch including a reference resistor having a predetermined value and a cell branch including an...
US-9,812,197 Clamp circuit
One example provides a device including a first transistor having a source-drain path electrically coupled between a first node and a second node. The device...
US-9,812,196 Geometry dependent voltage biases for asymmetric resistive memories
In one example, a system includes a multi-plane memory array with shared crossbars and memory elements accessed through the shared crossbars and support...
US-9,812,195 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device comprises a cell array including a plurality of first lines, a plurality of second lines intersecting the plurality of...
US-9,812,194 Decoding method, memory storage device and memory control circuit unit
A decoding method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining...
US-9,812,193 Threshold estimation using bit flip counts and minimums
A bit flip count is determined for each bin in a plurality of bins, including by: (1) performing a first read on a group of solid state storage cells at a first...
US-9,812,192 Superconducting gate memory circuit
One embodiment includes a superconducting gate memory circuit. The circuit includes a Josephson D-gate circuit configured to set a digital state as one of a...
US-9,812,191 Memory circuit with negative voltage assist
A memory device includes: a memory array comprising a first plurality of bit cells arranged along a first column; and a negative bit line (NBL) circuit, coupled...
US-9,812,190 Cell structure of 4T random access memory, random access memory and operation methods
The present disclosure provides a cell structure, a random access memory and operation methods. The cell structure with four transistors, including a first...
US-9,812,189 Read and write apparatus and method for a dual port memory
An apparatus is provided which comprises: a memory array; first logic to detect whether first and second word-lines (WL) for a row of the memory array are...
US-9,812,188 Static random-access memory (SRAM) sensor for bias temperature instability
An apparatus includes a static random-access memory and circuitry configured to initiate a corrective action associated with the static random-access memory....
US-9,812,187 Termination topology of memory system and associated memory module and control method
A memory system includes a memory controller and a memory module. The memory controller is arranged for selectively generating at least a clock signal and an...
US-9,812,186 Reducing latency in an expanded memory system
A first level buffer chip gates a target second level buffer chip according to a preset mapping relationship, a first chip select signal, and a first...
US-9,812,185 DRAM adjacent row disturb mitigation
The invention pertains to data disturb vulnerabilities in Dynamic Random Access Memory (DRAM) integrated circuits. In particular, it pertains to mitigating...
US-9,812,184 Current induced spin-momentum transfer stack with dual insulating layers
A high speed, low power method to control and switch the magnetization direction of a magnetic region in a magnetic device for memory cells using spin polarized...
US-9,812,183 Read latency reduction in a memory device
A memory device can include: a memory array with memory cells arranged as data lines; an interface that receives a read command requesting bytes of data in a...
US-9,812,182 Memory devices with improved refreshing operation
A method and a system for memory cell programming and erasing with refreshing operation are disclosed. The system includes a selecting module, a processing...
US-9,812,181 Memory circuit with transistors having different threshold voltages and method of operating the memory circuit
A memory circuit includes a memory cell, a data line configured to be coupled with the memory cell, a node, a precharge circuit, a first transistor of a first...
US-9,812,180 Programmable logic accelerator in system on chip
A programmable logic array (PLA) is disclosed employing programming logic tile (PLT), System On Chip (SOC) interface bus, Input Output (IO) blocks and Logic...
US-9,812,179 Techniques for reducing disturbance in a semiconductor memory device
Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a...
US-9,812,178 Semiconductor device
To provide a semiconductor device including a plurality of circuit blocks each of which is capable of performing power gating by setting off periods appropriate...
US-9,812,177 Circuit, method of using the circuit and memory macro including the circuit
A circuit includes a first latch for generating a first latched signal; and a first comparator for comparing the first latched signal and a write address, and...
US-9,812,176 Memory structure
A memory structure includes N array regions and N page buffers coupled to the N array regions, respectively. N is an integer.gtoreq.2. Each of the N array...
US-9,812,175 Systems and methods for annotating a video
A video may be presented on a touchscreen display. Reception of annotation input may be determined based on user's engagement with the touchscreen display....
US-9,812,174 Multimedia visual progress indication system
A multimedia visual progress indication system that provides a cache bar that is overlaid onto the program material or displayed on a dedicated display. A cache...
US-9,812,173 Signal recording apparatus, camera recorder, and signal processing system
A signal recording apparatus configured to classify video/sound materials is provided with a reduced operational burden. A metadata generator is configured to...
US-9,812,172 Video-processing apparatus, video-processing system, and video-processing method
According to the present disclosure, a master decoder acquires a generator synchronization signal for synchronization of video data based on a reference signal...
US-9,812,171 Intelligent media synchronization
Intelligent synchronization of media or other material output from multiple media devices is contemplated. The intelligence synchronization may include...
US-9,812,170 Method for automated television production
A method for updating a control event for controlling at least one device to produce audio visual content includes the steps of analyzing the control event to...
US-9,812,169 Operational system and architectural model for improved manipulation of video and time media data from...
The present invention provides a novel operational system and electronic architectural model for organizing and improving viewing and editing of time-based...
US-9,812,168 Electronic device and method for playing back image data
The present disclosure provides an electronic device and method for playing image data. The method for playing back image data in an electronic device includes...
US-9,812,167 Magnetic tape cartridge
A magnetic tape cartridge includes a substantially rectangular box shaped case that houses, inside a housing area, a single reel wound with a magnetic tape and...
US-9,812,166 Recording and reproducing device for reconstructing user data
A recording/reproducing device and a recording/reproducing method, which are capable of improving reliability of data while securing compatibility with a file...
US-9,812,165 Systems and methods for recording haptic data for use with multi-media data
A system includes a recorder configured to record audio and/or video of a subject of interest and output a recording of the subject of interest and a...
US-9,812,164 Read head characteristic pre-detection
Implementations disclosed herein provide a method comprising applying voltage to a read head during an unload state, detecting characteristic read head data,...
US-9,812,163 Spindle motor including sealing member and disk drive apparatus provided with same
A motor includes a bearing mechanism including a shaft disposed along a center axis extending in a lengthwise direction, a sealing member disposed on a lower...
US-9,812,162 Opening and closing device of rotating cage type jukebox disc tray
An opening and closing device comprises a disc tray, a mounting shaft and a jukebox manipulator. The disc tray is mounted on the mounting shaft. A positioning...
US-9,812,161 Resistive temperature sensors for improved asperity, head-media spacing, and/or head-media contact detection
A sensor supported by a head transducer has a temperature coefficient of resistance (TCR) and a sensor resistance. The sensor operates at a temperature above...
US-9,812,160 Low resistance ground joints for dual stage actuation disk drive suspensions
A stainless steel dual stage actuated disk drive head suspension baseplate including a plated electrical contact area having nickel and gold. The baseplate can...
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