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Patent # Description
US-9,818,841 Semiconductor structure with unleveled gate structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a fin structure formed over a substrate and a...
US-9,818,840 Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer and a third semiconductor layer formed on the...
US-9,818,839 Method of forming metal contacts in the barrier layer of a group III-N HEMT
Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second...
US-9,818,838 Semiconductor device
A method for fabricating a semiconductor device includes: forming a silicon nitride film having a refractive index equal to or larger than 2.2 on a nitride...
US-9,818,837 Process of forming an electronic device having an electronic component
In an embodiment, a process of forming an electronic device can include providing a semiconductor substrate having a first major side and an electronic...
US-9,818,836 Gate cut method for replacement metal gate integration
A method of manufacturing a FinFET structure involves forming a gate cut within a sacrificial gate layer and backfilling the gate cut opening with etch...
US-9,818,835 Semiconductor device
In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an...
US-9,818,834 Semiconductor device structure and method for forming the same
A method for forming a semiconductor device structure is provided. The method includes forming a gate stack, a spacer layer, and a dielectric layer over a...
US-9,818,833 Semiconductor device
A semiconductor device includes a first planar semiconductor (e.g., silicon) layer, first and second pillar-shaped semiconductor (e.g., silicon) layers, a first...
US-9,818,832 Semiconductor device
Provided is an integrated circuit having a LOCOS-drain type MOS transistor mounted thereon in which, even in the case of poor pattern formation, a withstand...
US-9,818,831 DMOS transistor including a gate dielectric having a non-uniform thickness
An electronic device can include a transistor having a drain region, a source region, a dielectric layer, and a gate electrode. The dielectric layer can have a...
US-9,818,830 Recessed contact to semiconductor nanowires
A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds...
US-9,818,829 Split poly connection via through-poly-contact (TPC) in split-gate based power MOSFETs
Embodiments of the present disclosure provide a contact structure in a split-gate trench transistor device for electrically connecting the top electrode to the...
US-9,818,828 Termination trench structures for high-voltage split-gate MOS devices
Apparatus and associated methods relate to an edge-termination structure surrounding a high-voltage MOSFET for reducing a peak lateral electric field. The...
US-9,818,827 Field plate trench semiconductor device with planar gate
A semiconductor device includes first and second load contacts and a semiconductor region extending along an extension direction. A surface region is arranged...
US-9,818,826 Heterostructure including a composite semiconductor layer
A heterostructure for use in an electronic or optoelectronic device is provided. The heterostructure includes one or more composite semiconductor layers. The...
US-9,818,825 Semiconductor device and method of fabricating the same
A method of fabricating a semiconductor device is provided as follows. A channel layer is formed on a strain relaxed buffer (SRB) layer. A first etching process...
US-9,818,824 Semiconductor substrate and semiconductor device including the same
A semiconductor substrate and a semiconductor device are provided. The semiconductor substrate includes a base substrate, a first silicon germanium layer on the...
US-9,818,823 Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a...
US-9,818,822 System for glass sheet semiconductor coating and resultant product
A glass sheet semiconductor deposition system (20) for coating semiconductor material on glass sheets is performed by conveying the glass sheets vertically...
US-9,818,821 Integrated RF front end system
Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band...
US-9,818,820 Oxide material and semiconductor device
Stable electrical characteristics are given to a transistor and a highly reliable semiconductor device is provided. In addition, an oxide material which enables...
US-9,818,819 Defect reduction using aspect ratio trapping
Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations...
US-9,818,818 Power semiconductor device including trench gate structures with longitudinal axes tilted to a main crystal...
A semiconductor device includes a semiconductor body with a first main crystal direction parallel to a horizontal plane. Longitudinal axes of trench gate...
US-9,818,817 Metal-insulator-metal capacitor over conductive layer
A method of fabricating a metal-insulator-metal (MIM) capacitor reduces the number of masks and processing steps compared to conventional techniques. A...
US-9,818,816 Metal capacitor design for improved reliability and good electrical connection
A metal capacitor is formed with good conductivity for both nodes of the capacitor and improved reliability. An embodiment includes a first layer of alternating...
US-9,818,815 Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate having a main surface; a first coil formed on the main surface; a first insulating film formed over...
US-9,818,814 Organic light emitting display devices and methods of manufacturing organic light emitting display devices
An organic light emitting display device includes a plurality of pixel regions on a substrate, each having a sub-pixel region, a transmissive region and a...
US-9,818,813 Method for producing array substrate and array substrate
Embodiments of the present application provide a method for producing an array substrate. The array substrate includes a planarization layer provided on a layer...
US-9,818,812 Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus includes a buffer layer formed on a substrate; a gate insulating layer formed over the buffer layer; an interlayer...
US-9,818,811 Organic light emitting display devices and methods of manufacturing organic light emitting display devices
An organic light emitting display device is disclosed. The organic light emitting display device includes a substrate, a first electrode, a pixel defining...
US-9,818,810 OLED and fabrication method thereof, and display apparatus
An OLED and a fabrication method thereof, and a display apparatus are provided. The OLED comprises: a base substrate; a first electrode, an organic functional...
US-9,818,809 Bank repair for organic EL display device
An examination is performed of whether or not a bank having a defect portion is present. When a bank having a defect portion is present, the bank having the...
US-9,818,808 Organic electroluminescence display panel and method of manufacturing the same
An organic EL display panel including: a substrate; a first lower electrode and a second lower electrode disposed over the substrate with a gap therebetween in...
US-9,818,807 Organic light emitting diode display
There is provided an organic light emitting diode display including: a substrate having a pixel area and a surrounding area enclosing the pixel area; an OLED...
US-9,818,806 Multi-functional active matrix organic light-emitting diode display
A multi-functional active matrix display comprises a transparent front sheet, a semi-transparent layer of light emissive devices adjacent the rear side of the...
US-9,818,805 Organic light emitting display device including a sound generating apparatus
Embodiments of the present disclosure relate to an organic light emitting display device which directly vibrates an organic light emitting display panel to...
US-9,818,804 Hybrid display
A hybrid pixel arrangement for a full-color display is provided, which includes an inorganic LED in at least one sub-pixel, and an organic emissive stack in at...
US-9,818,803 Pixel arrangement structure for organic light emitting display device
A pixel arrangement structure of an OLED display is provided. The pixel arrangement structure includes: a first pixel having a center coinciding with a center...
US-9,818,802 Electroluminescent device comprising channels, its manufacturing method, and display device
The present disclosure provides an electroluminescent device, its manufacturing method, a display substrate and a display device. The electroluminescent device...
US-9,818,801 Resistive three-dimensional memory device with heterostructure semiconductor local bit line and method of...
A three-dimensional resistive memory device includes an alternating stack of electrically conductive layers and insulating layers. Resistive memory elements are...
US-9,818,800 Self aligned semiconductor device and structure
A device, including: a first layer including first transistors and a second layer including second transistors, where at least one of the first transistors is...
US-9,818,799 Multi-layered conductive metal oxide structures and methods for facilitating enhanced performance...
A memory cell including a two-terminal re-writeable non-volatile memory element having at least two layers of conductive metal oxide (CMO), which, in turn, can...
US-9,818,798 Vertical thin film transistors in non-volatile storage systems
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and method of fabricating are described....
US-9,818,797 Magnetic memory device and method of manufacturing the same
According to one embodiment, a magnetic memory device includes a semiconductor substrate, an insulating region provided on the semiconductor substrate, an...
US-9,818,796 Planar qubits having increased coherence times
An interdigitated capacitor includes a substrate and a pair of comb-like electrodes both formed on the semiconductor substrate and horizontally arranged...
US-9,818,795 CMOS compatible thermopile with low impedance contact
In described examples, an integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming active areas which...
US-9,818,794 Solid-state image sensor and camera
An image sensor including a first semiconductor region of a first conductivity type that is arranged in a substrate, a second semiconductor region of a second...
US-9,818,793 Photoelectric conversion device and method for producing photoelectric conversion device
A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film...
US-9,818,792 Infrared sensor device and method for producing an infrared sensor device
An infrared sensor device includes a semiconductor substrate, at least one sensor element that is micromechanically formed in the semiconductor substrate, and...
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