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Patent # Description
US-9,831,118 Reducing neighboring word line in interference using low-k oxide
Techniques for fabricating a memory device which has reduced neighboring word line interference, and a corresponding memory device. The memory device comprises...
US-9,831,117 Self-aligned double spacer patterning process
Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method...
US-9,831,116 FETS and methods of forming FETs
An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation...
US-9,831,115 Process flow for manufacturing semiconductor on insulator structures in parallel
A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator...
US-9,831,114 Self-aligned trench isolation in integrated circuits
A system and method for providing electrical isolation between closely spaced devices in a high density integrated circuit (IC) are disclosed herein. An...
US-9,831,113 Semiconductor device having element separation region formed from a recess-free trench
A method of manufacturing a semiconductor device includes forming a silicon nitride film having an opening portion on a semiconductor substrate, forming a...
US-9,831,112 Substrate processing apparatus and substrate detaching method
A substrate processing apparatus includes an electrostatic chuck that includes a chuck electrode and electrostatically attracts a substrate; a direct voltage...
US-9,831,111 Apparatus and method for measurement of the thermal performance of an electrostatic wafer chuck
An apparatus and method are described for measuring the thermal performance of a wafer chuck, such as an electrostatic chuck. In one example, the apparatus ha a...
US-9,831,110 Vision-based wafer notch position measurement
A wafer alignment system includes an image capture device that captures an image of a wafer positioned on a pedestal. An image analysis module analyzes the...
US-9,831,109 High temperature process chamber lid
Lid assemblies for processing chamber and processing chambers including the lid assemblies are described. The lid assemblies include a high temperature lid...
US-9,831,108 Thermal processing apparatus and thermal processing method for heating substrate by light irradiation
A susceptor that holds a semiconductor wafer placed thereon is capable of moving up and down inside a chamber. For preheating with a halogen lamp, the susceptor...
US-9,831,107 Processing system and method for providing a heated etching solution
A method and processing system are provided for independent temperature and hydration control for an etching solution used for treating a wafer in process...
US-9,831,105 Method for moulding and surface processing electronic components and electronic component produced with this method
The invention relates to a method for moulding and surface processing electronic components wherein a grid of electronic components is attached on a carrier;...
US-9,831,104 Techniques for molded underfill for integrated circuit dies
Techniques for providing a unified underfill and encapsulation for integrated circuit die assemblies. These techniques include a molding technique that includes...
US-9,831,103 Manufacturing method of interposed substrate
A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal...
US-9,831,101 Method for manufacturing semiconductor device
An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for...
US-9,831,100 Solution based etching of titanium carbide and titanium nitride structures
Provided are methods for fabricating transistors using a gate last approach. These methods involve etching of titanium nitride and titanium carbide structures...
US-9,831,099 Method and apparatus for multi-film deposition and etching in a batch processing system
Embodiments of the invention describe a method and apparatus for multi-film deposition and etching in a batch processing system. According to one embodiment,...
US-9,831,098 Methods for fabricating integrated circuits using flowable chemical vapor deposition techniques with...
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an isolation trench...
US-9,831,097 Methods for selective etching of a silicon material using HF gas without nitrogen etchants
The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching...
US-9,831,096 Plasma processing method and plasma processing apparatus
A plasma processing method including disposing a wafer to be processed on a sample stage disposed in a processing chamber within a vacuum vessel, supplying an...
US-9,831,095 Method for performing selective etching of a semiconductor material in solution
A method for performing selective etching of a semiconductor material in solution having the following successive steps: a) providing a substrate having a layer...
US-9,831,094 Enhanced thin film deposition
Methods of producing metal-containing thin films with low impurity contents on a substrate by atomic layer deposition (ALD) are provided. The methods preferably...
US-9,831,093 Semiconductor device and manufacturing method thereof
In a semiconductor device, a memory cell is formed of a control gate electrode and a memory gate electrode adjacent to each other, a gate insulating film formed...
US-9,831,092 Semiconductor device and method for manufacturing the same
A semiconductor device includes a control gate electrode and a memory gate electrode which are formed over the main surface of a semiconductor substrate in a...
US-9,831,091 Plasma treating a process chamber
Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon...
US-9,831,090 Method and structure for semiconductor device having gate spacer protection layer
A method of forming a semiconductor device includes providing a precursor. The precursor includes a substrate; a gate stack over the substrate; a first...
US-9,831,089 Method for adjusting effective work function of metal gate
A method for adjusting an effective work function of a metal gate. The method includes forming a metal gate arrangement comprising at least a metal work...
US-9,831,088 Composition and process for selectively etching metal nitrides
A removal composition and process for selectively removing a first metal gate material (e.g., titanium nitride) relative to a second metal gate material (e.g.,...
US-9,831,087 Split gate embedded flash memory and method for forming the same
Provided is a split-gate embedded flash memory cell and method for forming the same. The flash memory cell includes split-gate transistors in which the control...
US-9,831,086 Method for manufacturing semiconductor substrate
A method for manufacturing a semiconductor substrate that, even when a substrate which has, on a surface thereof, a three-dimensional structure having...
US-9,831,085 Method of fabricating hafnium oxide layer and semiconductor device having the same
Provided are a method of fabricating a hafnium oxide layer and a method of fabricating a semiconductor device using the same. The method of fabricating a...
US-9,831,084 Hydroxyl group termination for nucleation of a dielectric metallic oxide
A surface of a semiconductor-containing dielectric material/oxynitride/nitride is treated with a basic solution in order to provide hydroxyl group termination...
US-9,831,083 Method of manufacturing semiconductor device, substrate processing apparatus and non-transitory...
A film containing a prescribed element and carbon is formed on a substrate, by performing a cycle a prescribed number of times, the cycle including: supplying...
US-9,831,081 Method for treating substrate
In embodiment, the method includes cleaning a preceding substrate, and drying the preceding substrate and cleaning a next substrate. Drying the preceding...
US-9,831,080 Method for manufacturing semiconductor device including a heat treatment step
A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and...
US-9,831,079 Method and apparatus for injection of ions into an electrostatic ion trap
A method of injecting ions into an electrostatic trap, comprising: generating ions in an ion source; transporting the ions from the ion source to an ion store...
US-9,831,078 Ion source for mass spectrometers
Ion sources for use in mass spectrometry (MS) systems are described. The ion sources each comprise an ion funnel and an ionization source configured to ionize...
US-9,831,077 Method for analyzing evolved gas and evolved gas analyzer
Disclosed herein is an evolved gas analyzer and a method for analyzing evolved gas, the apparatus enhancing detection accuracy for gas component without...
US-9,831,076 Ion interface device having multiple confinement cells and methods of use thereof
A device and associated method are disclosed for interfacing an ion trap to a pulsed mass analyzer (such as a time-of-flight analyzer) in a mass spectrometer....
US-9,831,075 Source magnet for improved resputtering uniformity in direct current (DC) physical vapor deposition (PVD) processes
A magnetic field forming apparatus includes a support member having a first side and a second side coupling a first end to a second end and an axis of rotation...
US-9,831,074 Bipolar collimator utilized in a physical vapor deposition chamber
The present invention provides an apparatus including a bipolar collimator disposed in a physical vapor deposition chamber and methods of using the same. In one...
US-9,831,073 Low deflection sputtering target assembly and methods of making same
Described is a design and method for producing a sputtering target assembly with low deflection made from target material solder bonded to composite backing...
US-9,831,072 Sputter target and sputtering methods
The present disclosure concerns sputter targets and sputtering methods. In particular, sputter targets and methods of sputtering using conventional sputter...
US-9,831,071 Systems and methods for using multiple inductive and capacitive fixtures for applying a variety of plasma...
Systems and methods for using multiple inductive and capacitive fixtures for applying a variety of plasma conditions to determine fixed parameters of a match...
US-9,831,070 Surface treater with expansion electrode arrangement
An expansion mount, electrode arrangement and a surface treater station include a mounting block with one or more clamps pivotally coupled to the mounting block...
US-9,831,069 CVD apparatus and method for forming CVD film
Heretofore, silicon nitride film formed by low pressure plasma CVD has been used for an antireflection film of a solar battery. But it is difficult to reduce...
US-9,831,068 Method for activating an inner surface of a substrate tube for the manufacturing of an optical-fiber preform
A method activates the inner surface of a substrate tube via plasma etching with a fluorine-containing etching gas. An exemplary method includes the steps of...
US-9,831,067 Film-forming apparatus
In a film-forming apparatus according to an aspect, a substrate placed on a substrate placing region passes through a first region and a second region in this...
US-9,831,066 Compact microwave plasma applicator utilizing conjoining electric fields
A plasma applicator includes a plasma discharge tube and a microwave cavity at least partially surrounding a portion of the plasma discharge tube. Microwave...
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