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Patent # Description
US-9,853,091 Side bottom contact RRAM structure
The present disclosure relates to an integrated circuits device having an RRAM cell, and an associated method of formation. In some embodiments, the integrated...
US-9,853,090 Vertical bit line non-volatile memory systems and methods of fabrication
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory...
US-9,853,089 Semiconductor device and structure
A semiconductor device, including: a first memory cell including a first transistor; a second memory cell including a second transistor, where the second...
US-9,853,088 All-printed paper memory
All-printed paper-based substrate memory devices are described. In an embodiment, a paper-based memory device is prepared by coating one or more areas of a...
US-9,853,087 Magnetoresistive random access memory device and method of manufacturing the same
A method of manufacturing an MRAM device includes sequentially forming a first insulating interlayer and an etch-stop layer on a substrate. A lower electrode is...
US-9,853,086 CMOS-based thermopile with reduced thermal conductance
In described examples, an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between CMOS transistors and...
US-9,853,085 Imaging device and electronic apparatus
There is provided an imaging device that includes photovoltaic type pixels that have photoelectric conversion regions generating photovoltaic power for each...
US-9,853,084 Method of manufacturing a semiconductor device
A method of manufacturing an image sensor device includes, in a first manufacturing facility, forming a first set of patterned silicon, metal, and insulating...
US-9,853,083 Method for fabricating an image-sensor structure
An image-sensor structure is provided. The image-sensor structure includes a substrate having a first surface and a second surface and including a sensing area,...
US-9,853,082 Color filter array and micro-lens structure for imaging system
A color filter array and micro-lens structure for imaging system and method of forming the color filter array and micro-lens structure. A micro-lens material is...
US-9,853,081 Semiconductor device, electrical device system, and method of producing semiconductor device
A semiconductor device includes a first semiconductor layer; an insulation member layer formed on the first semiconductor layer; a transistor disposed in an...
US-9,853,080 Pixels with multiple charge storage regions
An imaging pixel may be provided with a photodiode and a floating diffusion region. The pixel may include multiple charge storage regions interposed between the...
US-9,853,079 Method of forming a stress released image sensor package structure
A sensor package that includes a substrate with opposing first and second surfaces. A plurality of photo detectors are formed on or under the first surface and...
US-9,853,078 Wafer level curved image sensors and method of fabricating the same
A wafer level curved image sensor may include a substrate having a central region, a peripheral region, and an edge region, the peripheral region being formed...
US-9,853,077 Solid-state imaging device and electronic apparatus
A solid-state imaging device includes a semiconductor layer on which a plurality of pixels are arranged along a light-receiving surface being a main surface of...
US-9,853,076 Stacked grid for more uniform optical input
A back side illumination (BSI) image sensor with stacked grid shifting is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid...
US-9,853,075 Image sensor having shielding structure
An image sensor is provided. The image sensor includes a substrate, a first interlayer insulating layer, a first metal line, and a shielding structure. The...
US-9,853,074 Chip scale sensing chip package
This present invention provides a chip scale sensing chip package, comprising: a sensing chip with a first top surface and a first bottom surface opposite to...
US-9,853,073 Image sensor for producing vivid colors and method of manufacturing the same
An image sensor and a method of manufacturing the same are provided. The image sensor includes a photoelectric conversion layer; a color filter disposed on the...
US-9,853,072 Solid-state imaging element and manufacturing method for solid-state imaging element
Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image,...
US-9,853,071 Silicon photoelectric multiplier with very low optical cross-talk and fast readout
The silicon-based photomultiplier device comprises a substrate (1), a first layer (2) of a first conductivity type, a second layer (3) of a second conductivity...
US-9,853,070 Method of manufacturing display panel substrate
A method of manufacturing a display panel substrate having a semiconductor element includes a film forming step of forming a thin film, a resist film forming...
US-9,853,069 Method for manufacturing semiconductor device
An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed...
US-9,853,068 Light-emitting device
To provide a light-emitting device in which variation in luminance among pixels caused by variation in threshold voltage of transistors can be suppressed. The...
US-9,853,067 Thin film transistor array substrate
A thin film transistor array substrate includes a substrate, a plurality of pixel elements arranged on the substrate, each of the pixel elements including a...
US-9,853,066 Semiconductor device and manufacturing method thereof
An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor...
US-9,853,064 Manufacture method of via hole, manufacture method of display panel, and display panel
A manufacture method of a via hole for a display panel, a manufacture method of a display panel, and a display panel are provided. During forming the via hole,...
US-9,853,063 Display device
Even when a light shielding film is provided between a transistor and a substrate, a threshold voltage of the transistor can be prevented or suppressed from...
US-9,853,062 Display panel and display apparatus
A display panel includes a plurality of display elements disposed in a matrix manner, signal input parts to which signals to be supplied to the plurality of...
US-9,853,061 Display device and manufacturing method thereof
The present invention discloses a display device and a manufacturing method thereof. The display device comprises an array substrate and a color filter...
US-9,853,060 Thin film transistor substrate and method of manufacturing the same
A TFT substrate including a base substrate that includes a plurality of pixel areas; a gate line on the base substrate and extending in a first direction; a...
US-9,853,059 Semiconductor device
A semiconductor device includes a first transistor including a first electrode, a first insulating layer above the first electrode, the first insulating layer...
US-9,853,058 Thin film transistor array panel and display device including the same
Embodiments of the present invention relate to a thin film transistor array panel and a display device including the same. An exemplary embodiment of the...
US-9,853,057 Display array substrate and manufacturing method thereof
A display array substrate includes a substrate, a plurality of gate lines and a plurality of data lines disposed on the substrate, and a plurality of gate...
US-9,853,056 Strained CMOS on strain relaxation buffer substrate
A set of silicon fins for n-type FinFET devices and a set of silicon germanium fins for p-type FinFET devices are provided on a strain relaxation buffer (SRB)...
US-9,853,055 Method to improve crystalline regrowth
The migration of dislocations into pristine single crystal material during crystal growth of an adjacent conductive strap is inhibited by a conductive barrier...
US-9,853,054 Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask layer...
US-9,853,053 Three dimension integrated circuits employing thin film transistors
An integrated circuit which enables lower cost yet provides superior performance compared to standard silicon integrated circuits by utilizing thin film...
US-9,853,052 Semiconductor device and method for manufacturing same
According to one embodiment, the circuit portion includes a transistor provided at a region separated from the first stacked portion in the substrate. The...
US-9,853,051 Semiconductor device and method of manufacturing the same
A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and one or more openings. The pad structure may...
US-9,853,050 Semiconductor memory device and method for manufacturing the same
According to an embodiment, a semiconductor memory device includes a substrate, at least one stacked body, and a first insulating film. The stacked body...
US-9,853,049 Memory devices having common source lines including layers of different materials
A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of channel...
US-9,853,048 Memory device and method of manufacturing the same
A memory device includes a plurality of gate electrode layers, an interlayer insulating layer, a plurality of contact plugs, and at least one contact insulating...
US-9,853,047 Semiconductor device and method of manufacturing the same
There is provided a semiconductor device. The semiconductor device includes a source layer, a well pickup layer formed on the source layer, a body structure...
US-9,853,046 Apparatuses and methods for forming multiple decks of memory cells
Some embodiments include apparatuses and methods having multiple decks of memory cells and associated control gates. A method includes forming a first deck...
US-9,853,045 Semiconductor device having channel holes
A semiconductor device includes a gate stack including gate electrodes stacked vertically on a substrate. Channel holes penetrate through the gate stack to...
US-9,853,044 Semiconductor device and method of fabricating the same
A semiconductor device is provided. The semiconductor includes a plurality of interlayer insulating layers and a plurality of gate electrodes alternately...
US-9,853,043 Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material
A method of forming a three-dimensional memory device, includes forming a lower stack structure of insulating and first sacrificial material layers over a...
US-9,853,042 Semiconductor device and method of manufacturing the same
The semiconductor device includes a stacked structure having alternately stacked conductive patterns and interlayer insulating patterns, a through-hole passing...
US-9,853,041 Semiconductor device and methods of manufacturing and operating the same
A semiconductor device includes a memory cell array including a vertical channel layer, two or more selection transistors, and a plurality of memory cells...
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