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Patent # Description
US-9,887,193 Integrating a planar field effect transistor (FET) with a vertical FET
One embodiment provides a method of integrating a planar field-effect transistor (FET) with a vertical FET. The method comprises masking and etching a...
US-9,887,192 Interconnects for vertical-transport field-effect transistors
Structures and fabrication methods for vertical-transport field-effect transistors. The structure includes a vertical-transport field-effect transistor having a...
US-9,887,191 Semiconductor device
The re-combination center introduction region has re-combination centers introduced therein so that a density of the re-combination centers in the ...
US-9,887,190 Semiconductor device and method for manufacturing the same
A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. In the semiconductor device, the...
US-9,887,189 Integrated circuits with resistors
An integrated circuit includes transistor and resistor. The transistor includes a gate stack. The gate stack includes a first dielectric layer, a first...
US-9,887,188 Electro-static discharge structure, circuit including the same and method of using the same
An electro-static discharge (ESD) structure includes an input pad, and a first switching device electrically connected to the input pad. The ESD structure...
US-9,887,187 Semiconductor device for preventing field inversion
A semiconductor device includes a semiconductor layer having an element formation region in which a semiconductor element is formed. An element isolation well...
US-9,887,186 Memory circuit, layout of memory circuit, and method of forming layout
A memory circuit includes a first active structure extending along a first direction, a second active structure extending along the first direction, a first...
US-9,887,185 Packaging of LED chips and driver circuit on the same substrate
The purpose of the present invention is to reduce the size and thickness of an LED module. The LED module includes a circuit substrate, at least two supply...
US-9,887,184 Display apparatus and manufacturing method thereof
A display apparatus and a method of manufacturing the same are disclosed. The display apparatus includes: a first substrate including a light emitting diode...
US-9,887,183 Power module with the integration of control circuit
The present disclosure provides a power module with the integration of a control circuit at least, including: a power substrate; a power device mounted on the...
US-9,887,182 3DIC structure and method for hybrid bonding semiconductor wafers
Methods for improving hybrid bond yield for semiconductor wafers forming 3DIC devices includes first and second wafers having dummy and main metal deposited and...
US-9,887,181 Light emitting device
A light emitting device includes a first light emitting element having a first front surface and a first lateral surface, and a second light emitting element...
US-9,887,180 Method for producing a semiconductor component and a semiconductor component
A method for producing a plurality of semiconductor components and a semiconductor component are disclosed. In an embodiment the method includes applying a...
US-9,887,179 Light emitting diode device and light emitting device using the same
A light emitting diode device including a substrate, a plurality of light emitting elements, and an encapsulant. The substrate has a front surface and a back...
US-9,887,178 Semiconductor device and method of manufacturing the same
An example method includes disposing a semiconductor element on a first surface of a substrate. The substrate includes multiple solder balls mounted on a second...
US-9,887,177 Systems, methods and devices for inter-substrate coupling
Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a...
US-9,887,176 Semiconductor package
A semiconductor device is disclosed. The semiconductor device comprises a first die, a second die, and a redistribution structure. The first die and the second...
US-9,887,175 Lighting device
A lighting device includes a plurality of organic EL light-emitting devices having organic EL elements, and a plurality of LEDs. The LEDs are provided as point...
US-9,887,174 Semiconductor device manufacturing method, semiconductor device, and wire bonding apparatus
A semiconductor device manufacturing method includes: raising and moving a bonding tool, while paying out a wire, in a direction from a second toward a first...
US-9,887,173 Method for producing structured sintered connection layers, and semiconductor element having a structured...
A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced...
US-9,887,172 Bonding wire for semiconductor device
A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer on a surface of the Cu alloy core material, and contains Ga...
US-9,887,171 Semiconductor device having semiconductor chip with large and small irregularities on upper and lower side...
A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the...
US-9,887,170 Multi-layer metal pads
A method for fabricating a semiconductor device includes forming a conductive liner over a first landing pad in a first region and over a second landing pad in...
US-9,887,169 Signal isolation structures for EM communication
Methods, systems, and apparatus for EM isolation structures. One of the apparatus includes a communication module, the communication module including: a printed...
US-9,887,168 Thermal flow meter
Provided is a thermal flow meter that can be prevented from being eroded due to adhesion of water or like to a cut end portion of the lead exposed from the mold...
US-9,887,167 Embedded component package structure and method of manufacturing the same
A package structure includes a carrier defining a cavity in which a die is disposed. A dielectric material fills the cavity around the die. A first conductive...
US-9,887,166 Integrated circuit assemblies with reinforcement frames, and methods of manufacture
An assembly with modules (110, 1310) containing integrated circuits and attached to a wiring substrate (120) is reinforced by one or more reinforcement frames...
US-9,887,165 IC with insulating trench and related methods
An IC may include a semiconductor substrate having circuitry formed in the substrate, an interconnect layer above the semiconductor substrate and having an...
US-9,887,164 Semiconductor package and semiconductor device including an electromagnetic wave shielding member
A semiconductor package includes a semiconductor chip mounted on a substrate. The semiconductor package further includes an electromagnetic wave shielding...
US-9,887,162 Molding structure for wafer level package
A method in which microelectronic devices are attached to a substrate surface, wherein spaces interpose neighboring ones of the microelectronic devices. Each...
US-9,887,161 Techniques for forming interconnects in porous dielectric materials
Techniques are disclosed for forming interconnects in porous dielectric materials. In accordance with some embodiments, the porosity of a host dielectric layer...
US-9,887,160 Multiple pre-clean processes for interconnect fabrication
A method of making an interconnect structure includes forming an opening within a dielectric material layer disposed on a substrate including a conductive...
US-9,887,159 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: providing a substrate having a first semiconductor layer, an insulating layer, and a second...
US-9,887,158 Conductive structure having an entrenched high resistive layer
A conductive structure includes a substrate including a first dielectric layer formed thereon, a first trench formed in the first dielectric layer, a first...
US-9,887,157 Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate on which a contact region and a cell...
US-9,887,156 Backside device contact
A back-side device structure with a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, a trench that extends through the...
US-9,887,155 Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same
A semiconductor device including a conductive element and an interface surface fabricated atop the conductive element, and a method for fabricating such a...
US-9,887,154 Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes an insulating substrate including a substrate, a metal pattern formed on an upper surface of the substrate, and a metal film...
US-9,887,153 Circuit redistribution structure unit and method for manufacturing circuit redistribution structure
A method for manufacturing a circuit redistribution structure includes the following steps. A first dielectric is formed on a carrier. Conductive blind vias are...
US-9,887,152 Method for manufacturing semiconductor devices having a metallisation layer
A method for manufacturing semiconductor devices is disclosed. In one embodiment a semiconductor substrate having a first surface, a second surface opposite to...
US-9,887,151 Semiconductor device
To improve the reliability of a semiconductor device. A chip mounting portion TAB5 is arranged to be shifted to the +x direction side. Further, a gate electrode...
US-9,887,150 Semiconductor device
A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is...
US-9,887,149 Cavity package with die attach pad
A cavity package is provided. The package can include a metal leadframe and a substrate attached to an interposer formed as part of the leadframe. The substrate...
US-9,887,148 Fan-out semiconductor package structure and fabricating method
A fan-out semiconductor package includes a layer of adhesive covering a temporary carrier, a first redistribution layer disposed on the layer of adhesive, the...
US-9,887,147 Semiconductor device and process for fabricating the same
A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring...
US-9,887,146 Method and apparatus for chip cooling
In one embodiment, the invention is a method and apparatus for chip cooling. One embodiment of an apparatus for cooling a heat-generating device includes an...
US-9,887,145 Metal top stacking package structure and method for manufacturing the same
A meal top stacking package structure and a method for manufacturing the same are provided, wherein the metal top stacking package structure includes a metal...
US-9,887,144 Ring structure for chip packaging
A ring structure for chip packaging comprises a frame portion adaptable to bond to a substrate and at least one corner portion. The frame portion surrounds a...
US-9,887,143 Surface mount device package having improved reliability
A semiconductor package for mounting to a printed circuit board (PCB) includes a case comprising a ceramic base, a semiconductor die in the case, a mounting pad...
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