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Patent # Description
US-1,000,2905 Data storage devices
Data storage devices are provided. A data storage device includes a dielectric layer on a substrate. The data storage device includes a plurality of data...
US-1,000,2904 Encapsulation of magnetic tunnel junction structures in organic photopatternable dielectric material
Methods and devices are provided to construct magnetic devices, such as magnetic random access memory devices, having MTJ (magnetic tunnel junction) structures...
US-1,000,2903 Electronic device and method for fabricating the same
Implementations of the disclosed technology provide an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a magnetic...
US-1,000,2902 Solid-state imaging element, method of manufacturing the same, and imaging device for reducing thickness of...
In pixels that are two-dimensionally arranged in a matrix fashion in the pixel array unit of a solid-state imaging element, a photoelectric conversion film...
US-1,000,2901 Stacked image sensor with embedded FPGA and pixel cell with selectable shutter modes and in-pixel CDs
An imaging system with a pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor in a source follower configuration, and...
US-1,000,2900 Three-dimensional wafer scale integration of heterogeneous wafers with unequal die sizes
A method is provided for three-dimensional wafer scale integration of heterogeneous wafers with unequal die sizes that include a first wafer and a second wafer....
US-1,000,2899 Microlens for a phase detection auto focus (PDAF) pixel of a composite grid structure
An image sensor for high angular response discrimination is provided. A plurality of pixels comprises a phase detection autofocus (PDAF) pixel and an image...
US-1,000,2897 Solid-state imaging device, method of manufacturing a solid-state imaging device, and electronic apparatus
Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a...
US-1,000,2896 Housing for an infrared radiation micro device and method for fabricating such housing
Infrared radiation micro device, cover for such a device and method for its fabrication, the device comprising a substrate and a cover and an infrared radiation...
US-1,000,2895 Apparatus and methods for buried channel transfer gate
An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. A buried channel may be formed under the transfer gate. The buried...
US-1,000,2894 Imaging apparatus having same exposure period for signals held in signal holding units in first and second...
An imaging apparatus includes a plurality of pixels, a signal holding unit, first and second control electrodes. Each of the plurality of pixels includes a...
US-1,000,2893 Image sensor including hybrid pixel structure
Provided is an image sensor having a hybrid pixel structure in which pixels that sense visible light and pixels that sense ultraviolet light or infrared light...
US-1,000,2891 Logic circuit and semiconductor device
Exemplary semiconductor devices include eight transistors and two capacitors interconnected in specific configurations. A display device may include a driver...
US-1,000,2890 Liquid crystal display
A liquid crystal display according to an exemplary embodiment includes a first substrate, a gate line and a data line disposed on the first substrate, a first...
US-1,000,2889 Low-temperature polysilicon thin film transistor array substrate and method of fabricating the same, and...
The present invention provides a low-temperature polysilicon thin film transistor array substrate and a method of fabricating the same, and a display device....
US-1,000,2887 Array substrate, method for producing the same, and display apparatus
The present disclosure provides an array substrate, a method for producing the same and a display apparatus. The array substrate has a display region and a...
US-1,000,2886 Semiconductor device
Disclosed is a semiconductor device having a first transistor and a second transistor over the first transistor. The first transistor includes a first...
US-1,000,2885 Manufacturing method of semiconductor device
A substrate in which an insulating layer, a semiconductor layer and an insulating film are stacked on a semiconductor substrate and an element isolation region...
US-1,000,2883 Semiconductor device and manufacturing method thereof
An optical waveguide for optical signals is formed in a semiconductor layer of an SOI substrate, a heater for heating the optical waveguide is formed on a...
US-1,000,2882 Method for manufacturing a high-resistivity semiconductor-on-insulator substrate including an RF circuit...
A method for manufacturing a high-resistivity semiconductor-on-insulator substrate comprising the steps of: a) forming a dielectric layer and a semiconductor...
US-1,000,2881 Programmable integrated circuit standard cell
A standard cell for use within an integrated circuit can be partially personalized by local wiring. The standard cell can include a set of transistors, each...
US-1,000,2880 Semiconductor device and method for manufacturing same
According to one embodiment, an insulating layer is provided above a word line contact region portion. An upper surface of the insulating layer is at a height...
US-1,000,2879 Semiconductor structure having gate replacement and method for manufacturing the same
A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first stacked structures and two second stacked...
US-1,000,2878 Complementary SONOS integration into CMOS flow
Methods of integrating complementary SONOS devices into a CMOS process flow are described. The method begins with depositing and patterning a first photoresist...
US-1,000,2877 Three-dimensional semiconductor devices and fabricating methods thereof
A three-dimensional (3D) semiconductor memory device includes a CMOS circuit structure including a plurality of column blocks each comprising a plurality of...
US-1,000,2876 FinFET vertical flash memory
A plurality of fin structures containing, from bottom to top, a non-doped semiconductor portion and a second doped semiconductor portion of a first conductivity...
US-1,000,2875 Semiconductor devices with charge fixing layers
A semiconductor device may include gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating the gate...
US-1,000,2874 Method of forming conductive material of a buried transistor gate line and method of forming a buried...
A method of forming conductive material of a buried transistor gate line includes adhering a precursor comprising tungsten and chlorine to material within a...
US-1,000,2873 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes stacking a molding layer and a preliminary support layer on a substrate, forming a support layer...
US-1,000,2872 Three-dimensional vertical one-time-programmable memory
The present invention discloses a three-dimensional vertical one-time-programmable memory (3D-OTP.sub.V). It comprises a plurality of vertical OTP strings...
US-1,000,2871 High-K gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type...
An electrical device that includes at least one n-type field effect transistor including a channel region in a type III-V semiconductor device, and at least one...
US-1,000,2870 Process enhancement using double sided epitaxial on substrate
Disclosed examples include semiconductor devices and fabrication methods to fabricate semiconductor wafers and integrated circuits, including forming a first...
US-1,000,2869 Semiconductor structure and fabrication method thereof
The present disclosure provides semiconductor structures and fabrication methods thereof. An exemplary fabrication method includes providing a plurality of fins...
US-1,000,2868 Vertical fin resistor devices
Semiconductor devices and methods are provided in which vertical fin resistor devices are integrally formed as part of a process flow for fabricating FinFET...
US-1,000,2867 Fin-type field effect transistor structure and manufacturing method thereof
A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and...
US-1,000,2866 Method for forming capacitor, semiconductor device, module, and electronic device
A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided....
US-1,000,2865 3D semiconductor structure and device
A 3D structure, the structure including: a first stratum overlaid by a second stratum, the second stratum is less than two microns thick, where the first...
US-1,000,2864 Intra-metal capacitor and method of forming the same
An intra-metal capacitor is provided. The intra-metal capacitor is formed in a dielectric layer and comprising a first electrode and a second electrode, wherein...
US-1,000,2863 Semiconductor device and manufacturing method for the same
A semiconductor device is capable of accurately sensing a temperature of a semiconductor element incorporated in a semiconductor substrate. The semiconductor...
US-1,000,2862 Solid-state lighting structure with integrated short-circuit protection
A solid-state light source (SSLS) with an integrated short-circuit protection approach is described. A device can include a SSLS having an n-type semiconductor...
US-1,000,2861 ESD protection structure
An ESD protection structure formed within a semiconductor substrate of an integrated circuit device. The ESD protection structure comprises a thyristor...
US-1,000,2860 Integrated circuit and standard cell library
An integrated circuit includes at least one cell. The at least one cell includes a cell region defined by a cell boundary; a power line structure extending in a...
US-1,000,2859 Fin-FET resonant body transistor
Circuit structures including a FinFET resonant body transistor are disclosed. One circuit structure includes: a plurality of fins over a substrate and a...
US-1,000,2858 Power transistor module
A first conductive pattern includes: a first feeding point for supplying a potential to the first conductive pattern located at one end thereof; one or more...
US-1,000,2857 Package on package (PoP) device comprising thermal interface material (TIM) in cavity of an encapsulation layer
A package on package (PoP) device includes a first package, a thermal interface material, and a second package coupled to the first package. The first package...
US-1,000,2855 LED module with hermetic seal of wavelength conversion material
An LED module includes a substrate having a high thermal conductivity and at least one LED die mounted on the substrate. A wavelength conversion material, such...
US-1,000,2854 Semiconductor device and method
A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor...
US-1,000,2853 Stacked semiconductor package having a support and method for fabricating the same
A semiconductor package includes a substrate, and a first semiconductor chip stack disposed on the substrate. The first semiconductor chip stack includes a...
US-1,000,2852 Package on package configuration
A first integrated circuit (IC) package has a package substrate on bottom. The package substrate comprises a bottom redistribution circuitry configured...
US-1,000,2851 Semiconductor packages including chip enablement pads
A semiconductor package includes a package substrate and semiconductor chips stacked on the package substrate. The package substrate may include at least one...
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