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Patent # Description
US-1,000,8280 PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a...
Described herein is a ROM architecture featuring a ROM bitcell without a transistor, a ROM architecture wherein the bitcell device gate goes to a column address...
US-1,000,8279 Read only memory and data read method thereof
A read only memory including a ROM cell array, a plurality of word lines and a plurality of bit lines and a word line driver. The ROM cell array has a plurality...
US-1,000,8278 Memory block usage based on block location relative to array edge
A storage device includes storage circuitry and multiple memory blocks. The multiple memory blocks are arranged in an array, and each of the memory blocks...
US-1,000,8276 High accuracy leakage detection through low voltage biasing
Techniques are presented for determining current leakage from a memory array or other circuit based on a low voltage path. For example, the technique can be...
US-1,000,8275 Control method for solid state storage device
A control method for a solid state storage device is provided. Firstly, an elapsed time period of the solid state storage device is counted when the solid state...
US-1,000,8274 Low voltage detection circuit, nonvolatile memory apparatus including the same, and operating method thereof
A low voltage detection circuit includes a first detection block configured to detect a level of an external voltage according to a reference voltage, and...
US-1,000,8273 Cell current based bit line voltage
Apparatuses, systems, methods, and computer program products are disclosed for read level determination. A block of non-volatile storage cells has a plurality...
US-1,000,8272 Operation method of nonvolatile memory system that includes erase operations, fast erase operations, program...
A nonvolatile memory system includes a nonvolatile memory device and a memory controller that controls the nonvolatile memory device. The nonvolatile memory...
US-1,000,8271 Programming of dummy memory cell to reduce charge loss in select gate transistor
A memory device and associated techniques for reducing charge loss in a select gate transistor. A dummy memory cell is weakly programmed using a hot electron...
US-1,000,8270 Non-volatile memory device and programming method thereof
A programming method of a non-volatile memory device including a plurality of memory cells arranged in a plurality of cell strings includes sequentially...
US-1,000,8269 Semiconductor memory device
A semiconductor memory device includes a memory cell array having memory strings that include memory cells and first and second selection transistors. During a...
US-1,000,8268 Nonvolatile semiconductor memory device with a plurality of memory blocks and a shared block decoder
A nonvolatile semiconductor memory device includes a memory cell array having multiple blocks each with a plurality of memory strings. Each memory string has...
US-1,000,8267 Method for operating flash memory
The present disclosure relates to semiconductor devices and discloses a method for operating a flash memory. When a read operation is performed on a flash...
US-1,000,8266 Semiconductor device having electrically floating body transistor, semiconductor device having both volatile...
A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in...
US-1,000,8265 Method and apparatus for providing three-dimensional integrated nonvolatile memory (NVM) and dynamic random...
A memory system is configured to store information using a hybrid volatile and nonvolatile memory device. The memory system, in one aspect, includes memory...
US-1,000,8264 Memristive cross-bar array for determining a dot product
A method of obtaining a dot product includes applying a number of first voltages to a corresponding number of row lines within a memristive cross-bar array to...
US-1,000,8263 Method, system and device for complementary non-volatile memory device operation
Disclosed are methods, systems and devices for operation of dual non-volatile memory devices. In one aspect, a pair of non-volatile memory device coupled in...
US-1,000,8262 Memory and electronic device including the same
A semiconductor memory includes a cell array including a plurality of resistive memory cells in which a plurality of columns and a plurality of rows are...
US-1,000,8261 Sense amplifier in low power and high performance SRAM
A static random access memory (SRAM) includes an array of storage cells and a first sense amplifier. The array of storage cells is arranged as rows and columns....
US-1,000,8260 Clock generation circuitry for memory applications
Various implementations described herein are directed to an integrated circuit having level shift circuitry that receives a clock signal in a first voltage...
US-1,000,8259 Limiting bitline precharge drive fight current using multiple power domains
A system and method for efficient power, performance and stability tradeoffs of memory accesses are described. A memory includes an array of cells for storing...
US-1,000,8258 Method and circuit to enable wide supply voltage difference in multi-supply memory
A circuit can be used, for example, with a multi-supply memory device. The circuit includes a first conductor and a second conductor. A first transistor has a...
US-1,000,8257 Memory bitcell with column select
Embodiments include systems and methods for improving column selection functionality of memory circuits. Embodiments operate in context of memory bitcells...
US-1,000,8256 Sub word line driver of semiconductor memory device
A layout structure of a sub word line of a semiconductor memory device is disclosed. A sub word line driver of a semiconductor memory device includes: a...
US-1,000,8255 DRAM and access and operating method thereof
An operating method for a dynamic random access memory (DRAM) obtains a plurality of first sub-commands of a first activate command via a command bus, and...
US-1,000,8254 Apparatus having dice to perorm refresh operations
Some embodiments include an apparatus that comprise an interface chip having an oscillator to produce an original clock signal, a first memory chip having first...
US-1,000,8253 Array architecture and write operations of thyristor based random access memory
A memory cell includes a plurality of thyristors each having a first end and a second. The memory cell further includes a plurality of bit-lines. Each of the...
US-1,000,8252 Semiconductor system capable of storing different setting information in plurality of semiconductor chips...
A semiconductor system may include: an external channel including a CA (Command/Address) channel, and first and second data channels; and first and second...
US-1,000,8251 Magnetic memory having multiple gates and method of operating same
The disclosed technology generally relates to magnetic memory and more particularly to voltage-controlled magnetic memory, and to methods of using same. In one...
US-1,000,8250 Single level cell write buffering for multiple level cell non-volatile memory
Methods and apparatus related to cost optimized Single Level Cell (SLC) write buffering for Three Level Cell (TLC) Solid State Drives (SSDs) are described. In...
US-1,000,8249 Semiconductor memory device with increased operating speed
A semiconductor memory device includes a memory cell array comprising a plurality of spin torque transfer-magnetic random access memory (STT-MRAM) cells...
US-1,000,8248 Circuits and devices based on enhanced spin hall effect for efficient spin transfer torque
Devices or circuits based on spin torque transfer (STT) and Spin Hall effect are disclosed by using a spin Hall effect (SHE) metal layer coupled to a magnetic...
US-1,000,8247 Memory device for performing multi-core access to bank groups
A memory device has a burst length "b", performs "k" core accesses per command, and receives a command, where "b" is an integer of at least 2 and "k" is an...
US-1,000,8246 Memory and reference circuit calibration method thereof
A memory and a reference circuit calibration method are provided. The memory includes: a memory array including a plurality of memory cells; a reference circuit...
US-1,000,8245 Positioning components in a rack to permit base plane access
Aspects extend to devices that facilitate positioning components in a rack to permit base plane access. In one aspect, a drive carrier rail is configured to...
US-1,000,8244 Method for synchronously accessing audio data and audio playback system using the same
A method for synchronously accessing audio data and an audio playback system using the same are provided. The method comprises: providing a first device and a...
US-1,000,8243 System and methods for authoring and rendering thermal output during video playback on computer displays with...
Example implementations are directed to a system to generate keyframes describing the temperature output state of thermal output devices during the synchronous...
US-1,000,8242 Automatically syncing recordings between two or more content recording devices
This disclosure relates to systems and methods to synchronize recordings between content recording devices. A method may include establishing a synchronized...
US-1,000,8241 Method to mark and exploit at least one sequence record of a video presentation
The present invention proposes a method to mark and exploit at least one sequence record of a video presentation played on a multimedia unit, said method...
US-1,000,8240 Case video processing apparatus, case video processing system, and case video processing method
A video input unit inputs case video data to be processed, a face detector detects a face region of a person included in an image of video data, a target...
US-1,000,8239 System of automated script generation with integrated video production
Disclosed is a method of automated script generation with integrated video production; said method comprising assembling a script comprising a series of steps...
US-1,000,8238 System and method for incorporating digital footage into a digital cinematographic template
The invention provides a system, method and device--for inserting digital footage into a digital cinematographic template. The system includes a mobile device,...
US-1,000,8237 Systems and methods for creating and enhancing videos
Embodiments of the present disclosure help to automatically generate video selected from multiple video sources using intelligent sensor processing, thereby...
US-1,000,8236 Optical disk, optical disk recording device, and optical disk playback device
An optical disk includes a disk management information area in which predetermined information is recorded in advance, and a recording system area in which...
US-1,000,8235 Disc grabbing device and operating method thereof
A disc grabbing device including a body, a drive shaft, a first cam, a second cam, multiple first movable parts and multiple second movable parts are provided....
US-1,000,8234 Disc transfer device
A disc transfer device according to the present disclosure is a disc transfer device that transfers a disc in a first direction from a first position toward a...
US-1,000,8233 Recording medium changer and control method
A conveying block 20 for conveying recording mediums between slots 15 and a drive block 16 is provided with a recording medium delivery block 50 for delivering...
US-1,000,8232 Recording medium, method of manufacturing fullerene thin film, recording reproducing apparatus, information...
According to the present invention, there is provided a recording medium comprising a substrate, a platinum layer formed on the substrate and having a (111)...
US-1,000,8231 Shingled magnetic recording for writing tracks of variable track width
A storage device includes a storage controller configured to operate a heat-assisted magnetic recording head to write data to a band of consecutive data tracks...
US-1,000,8230 Magnetic tape device and head tracking servo method
The magnetic tape device includes: a magnetic tape; and a servo head, in which the servo head is a TMR head, the magnetic tape includes a non-magnetic support,...
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