Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,002,5749 Tracking circuit and method
A circuit includes a supply voltage node having a supply voltage value and a node having a node voltage, the node voltage having a node voltage value higher...
US-1,002,5748 Lane division multiplexing of an I/O link
A system can include a host device and a remote terminal. The host device can include a host terminal, the host terminal including a host configuration manager...
US-1,002,5747 I/O channel scrambling/ECC disassociated communication protocol
A protocol that enables communication between a host and an Input/Output (I/O) channel storage device, such as a Dynamic Random Access Memory (DRAM) channel...
US-1,002,5746 High performance interconnect
A signal is received, a boundary of which is to be sent in alignment with a sync counter value. A nominal latency of a link is determined based on the sync...
US-1,002,5745 Computer system, method for accessing peripheral component interconnect express endpoint device, and apparatus
A computer system and a method are provided for accessing a peripheral component interconnect express (PCIe) endpoint device. The computer system includes: a...
US-1,002,5744 Solid state disk
A solid state disk is provided, including: a main body, a light-emitting module and a light-guiding portion. The main body includes a shell portion, a substrate...
US-1,002,5743 Semiconductor device, semiconductor system including same, and semiconductor device control method
The invention aims at providing a semiconductor device, a semiconductor system including same, and a semiconductor device control method enabling it to...
US-1,002,5742 JBOD apparatus having BMC module and controlling method for the same
A JBOD apparatus (1) having a hard disk drive (HDD) expander (11), a switch (13) and a BMC module (12) is disclosed. The HDD expander (11) is connected to a...
US-1,002,5741 System-on-chip, mobile terminal, and method for operating the system-on-chip
A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit...
US-1,002,5740 Systems and methods for offloading link aggregation to a host bus adapter (HBA) in single root I/O...
A new approach is proposed to offload of link aggregation from a host to a HBA in SRIOV mode. The HBA first creates one or more link aggregation offload engines...
US-1,002,5739 Information processing system, information processing method, and recording medium
An information processing system according to the present invention includes: a plurality of processing units; a plurality of input/output units controlled by...
US-1,002,5738 Time and event based message transmission
A system, apparatus and method for efficient utilization of available band-width on the system's bus connection. The system includes a scheduler configured to...
US-1,002,5737 Interface for storage device access over memory bus
A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices. A...
US-1,002,5736 Exchange message protocol message transmission between two devices
In an embodiment of the invention, a method comprises: transmitting, by a host side, an exchange message protocol (EMP) command frame to a memory device side;...
US-1,002,5735 Decoupled locking DMA architecture
A decoupled Direct Memory Access (DMA) architecture includes at least two DMA controllers, and optionally at least one of the DMA controllers is operable to...
US-1,002,5734 Managing I/O operations based on application awareness
A method is used in managing input/output (I/O) operations based on application awareness. An I/O operation directed to storage is received. The storage is...
US-1,002,5733 Data output dispatching device and method
The present invention discloses a data output dispatching device and method capable of reducing the probability of packets from the same queue being transmitted...
US-1,002,5732 Preserving deterministic early valid across a clock domain crossing
A clock domain crossing can occur earlier in time by detection of when a data signal will coincide with a TSV (time slot valid) signal but the valid signal...
US-1,002,5731 Memory module and circuit providing load isolation and noise reduction
Certain embodiments described herein include a memory module having a printed circuit board including at least one connector configured to be operatively...
US-1,002,5730 Register device and method for software programming
A communication device is provided. The communication device includes a master interface unit that is configured to provide an interface between a processor and...
US-1,002,5729 Memory lock system with manipulatable input device and method of operation thereof
An electronic memory system and method of operation thereof includes: a manipulatable lock for receiving an input; a controller for enabling a communication...
US-1,002,5728 Flash memory device for storing sensitive information and other data
A flash memory process and device for encrypting and storing data in a non-volatile flash memory associated with a host system. The device includes a flash...
US-1,002,5727 Relay mechanism to facilitate processor communication with inaccessible input/output (I/O) device
A method includes transmitting, by a first processing device, a signal to a second relay processing device. The signal includes a message for the second relay...
US-1,002,5726 Method in a memory management unit for managing address translations in two stages
A memory management unit (MMU) may manage address translations. The MMU may obtain a first intermediate physical address (IPA) based on a first virtual address...
US-1,002,5725 Dynamic address translation table allocation
A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the...
US-1,002,5724 Address mapping method of memory system
Disclosed is an address mapping method of a memory system. The address mapping method may include grouping adjacent memory cells into multiple cubes, from a...
US-1,002,5723 Multiple page-size translation lookaside buffer
An example method includes receiving a request to change a page size managed by a translation lookaside buffer (TLB), wherein the TLB is currently managing a...
US-1,002,5722 Efficient translation reloads for page faults with host accelerator directly accessing process address space...
Systems and computer program products to perform an operation comprising identifying, in a software page frame table by an operating system interrupt handler, a...
US-1,002,5721 Input/output memory map unit and northbridge
The present invention provides for page table access and dirty bit management in hardware via a new atomic test[0] and OR and Mask. The present invention also...
US-1,002,5720 Cache organization and method
A method and information processing system with improved cache organization is provided. Each register capable of accessing memory has associated metadata,...
US-1,002,5719 Cache memory system and processor system
A cache memory system includes cache memories of at least one layer, at least one of the cache memories having a data cache to store data and a tag to store an...
US-1,002,5718 Modifying provisioned throughput capacity for data stores according to cache performance
Modifications to throughput capacity provisioned at a data store for servicing access requests to the data store may be performed according to cache performance...
US-1,002,5717 Multi-dimensional prefetching
An apparatus comprises an event memory to store one or more events, and a prefetch circuit. The prefetch circuit a) detects a current stride between a first...
US-1,002,5716 Mapping processor address ranges to persistent storage
A computer apparatus and related method to access storage is provided. In one aspect, a controller maps an address range of a data block of storage into an...
US-1,002,5715 Conditional inclusion of data in a transactional memory read set
Determining, by a processor having a cache, if data in the cache is to be monitored for cache coherency conflicts in a transactional memory (TM) environment. A...
US-1,002,5714 Memory type range register with write-back cache strategy for NVDIMM memory locations
A computer system includes a dual in-line memory module (DIMM), such as a registered DIMM (RDIMM), and a non-volatile DIMM (NVDIMM). A central processing unit...
US-1,002,5713 System and method for removing data from processor caches in a distributed multi-processor computer system
A processor (600) in a distributed shared memory multi-processor computer system (10) may initiate a flush request to remove data from its cache. A processor...
US-1,002,5712 Power-safe data management system
Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In...
US-1,002,5711 Hybrid write-through/write-back cache policy managers, and related systems and methods
Embodiments disclosed in the detailed description include hybrid write-through/write-back cache policy managers, and related systems and methods. A cache write...
US-1,002,5710 Pattern for integrating primary and secondary data stores in a sharded data domain
Example systems and methods for integrating a sharded primary data store (e.g., a source-of-truth relational database management system), a secondary data store...
US-1,002,5709 Convolutional de-interleaver and convolutional de-interleaving method
A convolutional de-interleaver for processing multiple groups of convolutional interleaved data is provided. The groups of convolutional interleaved data...
US-1,002,5708 Memory management method, memory control circuit unit and memory storage apparatus
A memory management method, and a memory control circuit unit and a memory storage apparatus using this method are provided. The method includes performing a...
US-1,002,5707 Non-volatile semiconductor memory device
A flash memory includes a memory array including a memory mat MAT-0, MAT-1; a page buffer 170-0, holding data read from the memory mat MAT-0; a page buffer...
US-1,002,5706 Control device, storage device, and storage control method
A control device includes: a management information generation unit configured to generate or update logical-physical block address management information with...
US-1,002,5705 Apparatus and system for object-based storage solid-state device
An object-based storage system comprising a host system capable of executing applications for and with an object-based storage device (OSD). Exemplary...
US-1,002,5704 Memory system including PE count circuit and method of operating the same
A memory system includes a memory device. The memory device includes a substrate. A memory array defines a plurality of pages, each page including a data area...
US-1,002,5703 Collectable display device
Provided is a collectable display device, including at least one display panel having at least one user accessible opening for housing and displaying at least...
US-1,002,5702 Browser capable of saving and restoring content item state
Features are disclosed for storing content items, such as content pages, applications, and other network-accessible content, such that changes to the state of...
US-1,002,5701 Application pre-release report
Various embodiments provide an automated testing analysis tool, termed a "pre-release analysis tool", that tests applications for functional and nonfunctional...
US-1,002,5700 Data mining technique with n-Pool evolution
Roughly described, a training database contains N segments of data samples. Candidate individuals identify a testing experience level, a fitness estimate, a...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.