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Patent # Description
US-1,003,2786 Semiconductor device and manufacturing method thereof
In a method of manufacturing a semiconductor device including a non-volatile memory formed in a memory cell area and a logic circuit formed in a peripheral...
US-1,003,2785 Semiconductor device and method of manufacturing semiconductor device
A pair of floating gates disposed to be spaced apart from each other by a first distance and a pair of spacer insulating films disposed on each of the pair of...
US-1,003,2784 One-time programmable bitcell with native anti-fuse
An OTP memory device includes a first and a second doped region of the same polarity in a semiconductor substrate. The second doped region has a higher doping...
US-1,003,2783 Integrated circuits having an anti-fuse device and methods of forming the same
Integrated circuits and methods of forming the same are provided. An exemplary integrated circuit includes a semiconductor substrate and an anti-fuse device...
US-1,003,2782 Static random access memory and manufacturing method thereof
A static random access memory (SRAM) cell includes first through fourth transistors being first type transistors and fifth and sixth transistors being second...
US-1,003,2781 Static random access memory device with halo regions having different impurity concentrations
In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region...
US-1,003,2780 Semiconductor device including dummy metal
A semiconductor device may include a plurality of dummy wirings formed on a substrate at different vertical levels and electrically floated and a plurality of...
US-1,003,2779 Semiconductor device with plasma damage protecting elements
An increase in chip area and a deterioration of delay performance are reduced without dummy cells or dummy gates for plasma damage, suppressing an increase in...
US-1,003,2778 Semiconductor device
A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate and are repeatedly arranged in a first direction and in a...
US-1,003,2777 Array of dynamic random access memory cells
An array of dynamic random access memory cells includes a first set of memory cell pairs in a first row, a second set of memory cells in a second row, and a...
US-1,003,2776 Method of maintaining the state of semiconductor memory having electrically floating body transistor
Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to...
US-1,003,2774 Semiconductor device and manufacture method thereof
A semiconductor device includes a semiconductor substrate and at least one gate stack. The gate stack is present on the semiconductor substrate, and the gate...
US-1,003,2773 FinFET with reduced capacitance
A structure including a plurality of fins etched from a semiconductor substrate, a gate electrode above and perpendicular to the plurality of fins, a pair of...
US-1,003,2772 Integrated circuits with high voltage devices and methods for producing the same
Methods of fabricating integrated circuits and integrated circuits fabricated by those methods are provided. In an exemplary embodiment, a method includes...
US-1,003,2771 Integrated circuits with capacitors and methods for producing the same
Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a first capacitor with a first...
US-1,003,2770 Semiconductor device structure and method
A multi-layered semiconductor device and method of manufacture are provided. In an embodiment a first semiconductor layer, a first insulator layer, a second...
US-1,003,2769 Cmos compatible fuse or resistor using self-aligned contacts
A semiconductor device includes dummy gate structures formed on a dielectric layer over a substrate and forming a gap therebetween. A trench silicide structure...
US-1,003,2768 Semiconductor device
A semiconductor device includes an antenna functioning as a coil, a capacitor electrically connected to the antenna in parallel, a passive element forming a...
US-1,003,2767 Field-effect semiconductor device
According to an embodiment of a semiconductor device, the semiconductor device includes a semiconductor body having a main surface, the semiconductor body...
US-1,003,2766 VDMOS transistors, BCD devices including VDMOS transistors, and methods for fabricating integrated circuits...
VDMOS transistors, Bipolar-CMOS-DMOS (BCD) devices including VDMOS transistors, and methods for fabricating integrated circuits with such devices are provided....
US-1,003,2765 Integrated circuits with electrostatic discharge protection and methods for producing the same
Integrated circuits and methods of producing such integrated circuits are provided. In an exemplary embodiment, an integrated circuit includes a deep well with...
US-1,003,2764 FinFET with ESD protection
In some embodiments, a field effect transistor structure includes a substrate, a fin structure and a gate structure. The fin structure is formed over the...
US-1,003,2763 Bulk cross-coupled high density power supply decoupling capacitor
In an aspect of the disclosure, a MOS device for using bulk cross-coupled thin-oxide decoupling capacitor is provided. The MOS device may include a pMOS...
US-1,003,2762 Semiconductor device
A semiconductor device includes a first diode having a cathode connected to a first terminal, a second diode having a cathode connected to a second terminal and...
US-1,003,2761 Electronic devices with tunable electrostatic discharge protection and methods for producing the same
Electronic devices and methods of producing such electronic devices are provided. In an exemplary embodiment, a method of producing an electronic device...
US-1,003,2760 Semiconductor device
A semiconductor device includes an annular-shaped first frame comprised of a ceramic and forming an inner cavity in which semiconductor elements are disposed. A...
US-1,003,2759 High-density semiconductor device
A method of manufacturing a semiconductor device includes providing a material above a substrate and respectively forming separate gate electrode lines on...
US-1,003,2758 Method of manufacturing semiconductor device
According to one embodiment, at first, a compound semiconductor layer is bonded to a position straddling a plurality of chip formation regions arranged on a...
US-1,003,2757 Projection display system
A light-emitting diode (LED) projector includes an LED display panel and a projection lens arranged in front of LED display panel and configured to collect and...
US-1,003,2756 Semiconductor package assembly with facing active surfaces of first and second semiconductor die and method for...
A semiconductor package assembly is provided. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package...
US-1,003,2755 Power semiconductor arrangement having a plurality of power semiconductor switching elements and reduced...
A multiplicity of power semiconductor switching elements of the same type parallel have a load current terminal for a load current input and a load current...
US-1,003,2754 Light-emitting apparatus and illumination apparatus
A method of manufacturing a light-emitting apparatus includes mounting a first light-emitting element and a second light-emitting element on a substrate. A...
US-1,003,2753 Flexible lighting device having both visible and infrared light-emitting diodes
A flexible lighting array, comprising: a flexible substrate; a pair of first electrical connectors formed on the flexible substrate; a pair of second electrical...
US-1,003,2752 Microelectronic package having stub minimization using symmetrically-positioned duplicate sets of terminals for...
A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face...
US-1,003,2751 Ultrathin layer for forming a capacitive interface between joined integrated circuit components
Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at...
US-1,003,2750 Integrated DC-DC power converters through face-to-face bonding
DC-DC power converters with GaN switches, magnetic inductors and CMOS power drivers integrated through face-to-face wafer bonding techniques are provided. In...
US-1,003,2749 Three-dimensional chip-to-wafer integration
An integrated circuit device is disclosed that includes a semiconductor substrate and a die attached to the semiconductor substrate. A conductive pillar is...
US-1,003,2748 Semiconductor package and fabricating method thereof
A semiconductor package structure and a method for making a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various...
US-1,003,2747 Light emitting diode package structure and manufacturing method thereof
A light emitting diode package structure and a manufacturing method thereof are disclosed. The light emitting diode package structure includes a carrier...
US-1,003,2746 Semiconductor device having recessed edges and method of manufacture
A device and method of manufacture is provided that utilize recessed regions along a package edge. For example, in an integrated fan-out package, the dielectric...
US-1,003,2745 Method of manufacturing semiconductor device
To enhance reliability in assembling a semiconductor device. There is provided a wiring substrate including a target mark, which is not provided on an extension...
US-1,003,2744 Universal surface-mount semiconductor package
A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly...
US-1,003,2743 Method for producing a semiconductor module
A semiconductor module is produced by providing a circuit carrier having a metallization, an electrically conductive wire and a bonding device. With the aid of...
US-1,003,2742 Method for obtaining a bonding surface for direct bonding
A process for obtaining a bonding surface for direct bonding includes: a) providing a substrate based on a sintered metal having a base surface with an RMS...
US-1,003,2741 Bonding wire for semiconductor device
There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a...
US-1,003,2740 Semiconductor device and manufacturing method thereof
A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a...
US-1,003,2739 Semiconductor device
Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (2) formed on the upper...
US-1,003,2738 Method for forming bump of semiconductor package
The present invention provides a method for forming bumps of a semiconductor package to suppress a final height difference between main bumps and support bumps...
US-1,003,2737 Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding...
US-1,003,2736 Semiconductor device
A source interconnect and a drain interconnect are alternately provided between a plurality of transistor units. One bonding wire is connected to a source...
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