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Patent # Description
US-1,003,2735 Semiconductor structure and method of forming
A device package and methods of forming are provided. The device package includes a logic die and a first passivation layer over the logic die. The device...
US-1,003,2734 Semiconductor package system and method
A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die...
US-1,003,2733 Fan-out semiconductor package
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a processor chip disposed in the through-hole; a memory chip...
US-1,003,2732 Semiconductor module arrangement
In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating...
US-1,003,2731 Voltage compensated switch stack
A radio frequency (RF) switch arrangement that improves the voltage handling capacity of a stack of switching elements (e.g., field-effect transistors (FETs))....
US-1,003,2730 Semiconductor chip having tampering feature
Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device...
US-1,003,2729 Apparatus and method for generating identification key
Provided is an apparatus for generating an identification key by using process variation in a conductive layer manufacturing process. The apparatus may include...
US-1,003,2728 Trench MOSFET device and the preparation method thereof
A trench-type metal-oxide-semiconductor field-effect transistor (MOSFET) device and a fabrication method are disclosed. The trench MOSFET device comprises a...
US-1,003,2727 Electrical package including bimetal lid
Electrical package including bimetal lid. The electrical package includes: an organic substrate; a semiconductor chip electrically connected to electrical pads...
US-1,003,2726 Embedded vibration management system
Methods for an embedded vibration management system are disclosed and may include fabricating a semiconductor package that supports vibration management by...
US-1,003,2725 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a plurality of devices, each of the plurality of devices includes a first surface disposed with an active component; and a...
US-1,003,2724 Silicon carbide semiconductor base, method of crystal axis alignment in silicon carbide semiconductor base, and...
On a first epitaxial layer of a first conductivity type or a second conductivity type provided on a front surface of a silicon carbide substrate, a mark...
US-1,003,2723 Metal layer independent version identifier
Version circuitry for use with a semiconductor chip having multiple layers includes multiple status bits. The versioning circuitry includes, for each status...
US-1,003,2722 Semiconductor package structure having am antenna pattern and manufacturing method thereof
A package structure has a first die, a second die, the third die, a molding compound, a first redistribution layer, an antenna and conductive elements. The...
US-1,003,2721 Low resistance contact structures for trench structures
An electrical device including at least one contact surface and an interlevel dielectric layer present atop the electrical device, wherein the interlevel...
US-1,003,2719 Semiconductor device structures
A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of...
US-1,003,2717 Vertical fuse structures
Semiconductor devices and methods are provided in which vertical fuse devices are integrally formed with FINFET (Fin Field Effect Transistor) devices, wherein...
US-1,003,2716 Advanced E-fuse structure with controlled microstructure
In one aspect of the invention, a method for fabricating an e-Fuse device is described. A trench structure is provided. The trench structure includes an anode...
US-1,003,2715 Ultra high performance interposer
An interconnection component includes a semiconductor material layer having a first surface and a second surface opposite the first surface and spaced apart in...
US-1,003,2714 Semiconductor switch
A semiconductor switch includes an insulating film on a semiconductor substrate. A switching circuit is on a first portion of the insulating film. The switching...
US-1,003,2713 Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes...
US-1,003,2712 Semiconductor structure
One or more embodiments of techniques or systems for forming a semiconductor structure are provided herein. A first metal region is formed within a first...
US-1,003,2711 Integrating metal-insulator-metal capacitors with air gap process flow
Semiconductor devices are provided which have MIM (metal-insulator-metal) capacitor structures that are integrated within air gaps of on-chip interconnect...
US-1,003,2710 Via pattern to reduce crosstalk between differential signal pairs
An integrated circuit (IC) system includes an IC coupled to a package. The package, in turn, is coupled to a ball grid array. The integrated circuit is...
US-1,003,2709 Embedding thin chips in polymer
Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a...
US-1,003,2708 Circuit board and smart card module and smart card utilizing the same
A circuit board and a smart card module and a smart card employing the circuit board are provided. The circuit board includes a substrate and a pad region...
US-1,003,2707 Post-grind die backside power delivery
Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a...
US-1,003,2706 Package substrates
A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy...
US-1,003,2705 Semiconductor package and manufacturing method thereof
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a...
US-1,003,2704 Reducing cracking by adjusting opening size in pop packages
A package includes a device die, a molding material molding the device die therein, and a surface dielectric layer at a surface of the package. A corner opening...
US-1,003,2703 Package-on-package semiconductor assemblies and methods of manufacturing the same
Package-on-package systems for packaging semiconductor devices. In one embodiment, a package-on-package system comprises a first semiconductor package device...
US-1,003,2702 Package structure and manufacturing method thereof
A package structure including a first redistribution circuitry and a second redistribution circuitry is provided. The first redistribution circuitry has a...
US-1,003,2700 Positional relationship among components of semiconductor device
A QFP has a die pad on which a semiconductor chip is mounted, a plurality of inner parts disposed around the die pad, a plurality of outer parts respectively...
US-1,003,2699 Flip chip self-alignment features for substrate and leadframe applications
Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of...
US-1,003,2698 Interconnection structure with confinement layer
An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic...
US-1,003,2697 Electronic component package and electronic device including the same
An electronic component package may include: a redistribution layer including a first insulating layer, a first conductive pattern disposed on the first...
US-1,003,2696 Chip package using interposer substrate with through-silicon vias
A microelectronic package includes an interposer with through-silicon vias that is formed from a semiconductor substrate and one or more semiconductor dies...
US-1,003,2695 Powermap optimized thermally aware 3D chip package
A semiconductor package includes a substrate, an integrated circuit disposed on the substrate, a memory support disposed on the integrated circuit, stacked...
US-1,003,2694 Power electronics assemblies having a semiconductor cooling chip and an integrated fluid channel system
A power electronics assembly includes a semiconductor device stack having a wide bandgap semiconductor device, a semiconductor cooling chip thermally coupled to...
US-1,003,2693 Heat transfer chassis and method for forming the same
A system includes a front plate, a manifold cover, and bridge heat sinks. The manifold cover is secured to the front plate to define a fluid distribution...
US-1,003,2692 Semiconductor package structure
Various embodiments relating to semiconductor package structures having reduced thickness while maintaining rigidity are provided. In one embodiment, a...
US-1,003,2691 Phase changing on-chip thermal heat sink
A method of forming an on-chip heat sink includes forming a device on a substrate. The method also includes forming a plurality of insulator layers over the...
US-1,003,2690 Semiconductor structure including a thermally conductive, electrically insulating layer
A thermally conductive and electrically insulating layer is provided over a semiconductor structure.
US-1,003,2689 Double-side cooling type power module and producing method thereof
Disclosed herein are a double-side cooling type power module and a producing method thereof. The double-side cooling type power module includes a pair of...
US-1,003,2687 Temperature control device, semiconductor device including the same, and method for controlling the...
A temperature control device for controlling a temperature of a semiconductor device including a first chip and a second chip. The temperature control device...
US-1,003,2686 Motor drive device and method capable of notifying malfunction in fluid flow in heat sink
A motor drive device detects the malfunction of a flow path in a heat sink based on the temperature of the device. The motor drive device includes: a...
US-1,003,2685 Electronic component and circuit module
An electronic component includes a core, a winding, and an electrode. A flange of the core includes a body having a first surface that faces a top side and is...
US-1,003,2684 Lead bonding structure
A lead bonding structure includes: a plurality of leads extending outward from a package; and a plurality of electrode pads formed on a circuit board. The...
US-1,003,2683 Time temperature monitoring system
A time temperature monitoring system and method for use with a microchip or similar structure. A disclosed system includes: a substrate having an active region;...
US-1,003,2682 Multi-die wafer-level test and assembly without comprehensive individual die singulation
Methods and apparatus are described for creating a multi-die package from a wafer without dicing the wafer into individual dies and reassembling the dies on an...
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