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Patent # Description
US-1,004,3839 Imaging apparatus and electronic apparatus
An imaging apparatus includes: an interposer on which an image sensor including a light reception section is disposed; a translucent member that is provided on...
US-1,004,3838 Image sensor
An image sensor may include: a photoelectric conversion element including a second conductive layer formed over a first conductive layer; an insulating layer...
US-1,004,3837 Image sensor
An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the...
US-1,004,3836 Display device
According to one embodiment, a display device includes an insulating substrate, display function layer disposed above the insulating substrate, reflective...
US-1,004,3835 Display device and method for manufacturing the same
A method for producing a display device includes locating a substrate, including a plurality of pixels, on a jig including a magnet; locating a plate formed of...
US-1,004,3834 Broken line repair method of TFT substrate
Disclosed is a broken line repair method of a TFT substrate. The method first finds out a broken line in the TFT substrate and a position of a broken point on...
US-1,004,3833 Semiconductor device
A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above...
US-1,004,3832 Display substrate, display device and display device identification method
A display substrate, a display device and a method to identify a display device are provided. The display substrate comprises a display region and a periphery...
US-1,004,3831 Array substrate and manufacturing method thereof and display panel
An array substrate and manufacturing method thereof and a display panel are disclosed. The manufacturing method of an array substrate includes: forming patterns...
US-1,004,3830 Thin film transistor circuit device and method of manufacturing the same
A thin film transistor (TFT) circuit device comprises a substrate comprising a major surface; a gate line formed over the substrate and extending in a first...
US-1,004,3829 TFT backplate structure and manufacture method thereof
A method is provided for manufacturing a thin film transistor (TFT) backplate that includes a switch TFT and a drive TFT. The method is conducted such that each...
US-1,004,3828 Semiconductor device
A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided....
US-1,004,3827 Flexible display device with side crack protection structure and manufacturing method for the same
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
US-1,004,3826 Fully depleted silicon on insulator integration
Certain aspects of the present disclosure generally relate to a semiconductor device. The semiconductor device generally includes a substrate, a first...
US-1,004,3825 Lateral bipolar junction transistor with multiple base lengths
A method comprises forming shallow trenches in an intrinsic base semiconductor layer and forming a first base layer thereon; applying a first mask to the layer;...
US-1,004,3824 Semiconductor device including a vacuum gap and method for manufacturing the same
The present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor on an insulator (SOI) substrate having a bottom...
US-1,004,3823 Semiconductor device
According to one embodiment, the semiconductor body of the first portion includes a first semiconductor part and a second semiconductor part. The first...
US-1,004,3822 Semiconductor memory devices having vertical pillars that are electrically connected to lower contacts
A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the...
US-1,004,3821 Non-volatile memory device and method of manufacturing same
According to an embodiment, a non-volatile memory device includes a first conductive layer, electrodes, an interconnection layer and at least one semiconductor...
US-1,004,3819 Method for manufacturing 3D NAND memory using gate replacement, and resulting structures
A 3D memory device includes a plurality of vertical pillars composed of a vertical channel and a multilayer data storage structure. The multilayer data storage...
US-1,004,3818 Semiconductor devices including stacked electrodes
Semiconductor devices are provided. A semiconductor device includes first and second stacks of electrodes. Moreover, the semiconductor device includes first and...
US-1,004,3817 Semiconductor memory device
A highly integrated semiconductor memory device includes a substrate, a plurality of vertical pillars above the substrate, a plurality of connection lines...
US-1,004,3816 Semiconductor device, systems and methods of manufacture
A semiconductor memory device includes a stack of word lines and insulating patterns. Cell pillars extend vertically through the stack of word lines and...
US-1,004,3815 Semiconductor memory device
A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a...
US-1,004,3814 Semiconductor substrate with a single protruding portion with multiple different widths and insulation thickness
A semiconductor device includes: a fin that is a portion of a semiconductor substrate, protrudes from a main surface of the semiconductor substrate, has a width...
US-1,004,3813 Method of manufacturing semiconductor device
A semiconductor device can be reduced in size. The semiconductor device has a first conductivity type p type well layer extending in the X direction of the main...
US-1,004,3812 Semiconductive structure with word line and method of fabricating the same
A method of fabricating a semiconductive structure with a word line includes providing a substrate including a memory cell region and a peripheral region. A...
US-1,004,3811 Semiconductor structure for preventing row hammering issue in DRAM cell and method for manufacturing the same
A semiconductor structure for preventing row hammering issue in DRAM cell is provided in the present invention. The structure includes a trench with a gate...
US-1,004,3810 Dynamic random access memory and method of fabricating the same
A dynamic random access memory (DRAM) is provided. The DRAM comprises a substrate, a plurality of isolation structures, a plurality of word lines, a plurality...
US-1,004,3809 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a bit line...
US-1,004,3808 Semiconductor memory
According to one embodiment, a semiconductor memory includes: a first gate of a first select transistor and a second gate of a second select transistor on a...
US-1,004,3807 Semiconductor device and method of forming the same
A semiconductor device and a method of forming the same, the semiconductor device includes a plural fin structures, two gates, a protection layer and an...
US-1,004,3806 Semiconductor devices and methods of manufacturing the same
A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so...
US-1,004,3805 Method to induce strain in finFET channels from an adjacent region
Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different...
US-1,004,3804 LDMOS design for a FinFET device
A method of manufacturing a semiconductor device is provided. The device includes a substrate including a first type region and a second type region, first and...
US-1,004,3803 Semiconductor device having gate electrodes with stacked metal layers
A semiconductor device includes a substrate having an active pattern thereon, a gate electrode intersecting the active pattern, and a spacer on a sidewall of...
US-1,004,3802 Gate structure with additional oxide layer
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a gate structure formed over the...
US-1,004,3801 Air gap spacer for metal gates
A method of forming a semiconductor device that includes forming a trench adjacent to a gate structure to expose a contact surface of one of a source region and...
US-1,004,3800 Integrated circuit device with gate line crossing fin-type active region
An integrated circuit device includes a substrate including a device active region, a fin-type active region protruding from the substrate on the device active...
US-1,004,3799 Method of manufacturing semiconductor device using surface treatment and semiconductor device manufactured by...
A method of manufacturing a semiconductor device includes forming a first plurality of recessed regions in a substrate, the substrate having a protruded active...
US-1,004,3798 Buried interconnect for semiconductor circuits
A semiconductor circuit comprises a Front End of Line (FEOL) comprising a plurality of transistors, each of which having a source region, a drain region and a...
US-1,004,3797 Techniques for forming vertical transistor architectures
Techniques are disclosed for forming vertical transistor architectures. In accordance with some embodiments, a semiconductor layer is disposed over a lower...
US-1,004,3796 Vertically stacked nanowire field effect transistors
A device includes a substrate, a first nanowire field effect transistor (FET), and a second nanowire FET positioned between the substrate and the first nanowire...
US-1,004,3794 Semiconductor device and electronic device
A semiconductor device includes a first wiring; a first switch having a function of controlling electrical connection between the first wiring and first and...
US-1,004,3793 Semiconductor device and circuit
The present disclosure relates to a semiconductor device. The semiconductor device includes a substrate, a first doping region, a second doping region, a third...
US-1,004,3792 Electrostatic protection device
An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a...
US-1,004,3791 Electric fields relaxation for semiconductor apparatus
A semiconductor apparatus includes a semiconductor substrate, a semiconductor element, an edge termination region that surrounds the semiconductor element, a...
US-1,004,3790 Diode device of transient voltage suppressor and manufacturing method thereof
A diode device of a transient voltage suppressor (TVS) is disclosed. The diode device includes a substrate, a first well, a second well, a first electrode and a...
US-1,004,3789 Semiconductor packages including an adhesive pattern
A semiconductor package is disclosed. The semiconductor package comprises a lower package including a first substrate and a semiconductor chip on the first...
US-1,004,3788 Micro light emitting diode display panel and repair method thereof
The present invention provides a micro light emitting diode display panel and a repair method thereof. The anode of the micro light emitting diode display panel...
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