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Patent # Description
US-1,004,2783 Host device, computing system including the same and a plurality of devices, interface link layer configuration...
A computing system includes a first storage device, a second storage device, and a host device configured to communicate with the first storage device and the...
US-1,004,2782 Immutable datastore for low-latency reading and writing of large data sets
Provided is a process including: receiving a write command requesting that a document associated with the write command be stored in an immutable data structure...
US-1,004,2781 Reducing data I/O using in-memory data structures
Techniques are described herein for generating and using in-memory data structures to represent columns in data block sets. In an embodiment, a database...
US-1,004,2780 Integrity protection for data storage
A method and system for protecting the integrity of a memory system. An age counter and an opportunity counter are provided for each of multiple memory blocks....
US-1,004,2779 Selective space reclamation of data storage memory employing heat and relocation metrics
Space of a data storage memory of a data storage memory system is reclaimed by determining heat metrics of data stored in the data storage memory; determining...
US-1,004,2778 Collapsed address translation with multiple page sizes
A computer system that supports virtualization may maintain multiple address spaces. Each guest operating system employs guest virtual addresses (GVAs), which...
US-1,004,2777 Hardware-based translation lookaside buffer (TLB) invalidation
Hardware-based translation lookaside buffer (TLB) invalidation techniques are disclosed. A host system is configured to exchange data with a peripheral...
US-1,004,2776 Prefetching based upon return addresses
An apparatus for processing data includes signature generation circuitry 30, 32 for generating a signature value indicative of the current state of the...
US-1,004,2775 Virtual disk alignment access
Embodiments relate to a virtualized storage environment with one or more virtual machines operating on a host and sharing host resources. Each virtual machine...
US-1,004,2774 Method and apparatus for masking and transmitting data
A method and apparatus for transmitting data includes determining whether to apply a mask to a cache line that includes a first type of data and a second type...
US-1,004,2773 Advance cache allocator
Systems and techniques for advance cache allocation are described. A described technique includes selecting a job from a plurality of jobs; selecting a...
US-1,004,2772 Dynamic structural management of a distributed caching infrastructure
Embodiments of the present invention provide a method, system and computer program product for the dynamic structural management of an n-Tier distributed...
US-1,004,2771 Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit...
Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit (CPU)-based system is disclosed. In some...
US-1,004,2770 Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more instruction sequencing...
US-1,004,2769 System and method for managing cache space and electronic device employing same
A method for managing cache space between one electronic device and multiple storage devices includes identifying and quantifying storage devices connected to...
US-1,004,2768 Virtual machine migration
A method and system are provided for a storage area network including a plurality of virtual servers. In one example, the system sends a storage area network...
US-1,004,2767 Electronic device and method for fabricating the same
An electronic device is provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a...
US-1,004,2766 Data processing apparatus with snoop request address alignment and snoop response time alignment
A home node of a data processing apparatus that includes a number of devices coupled via an interconnect system is configured to provide efficient transfer of...
US-1,004,2765 Read and write sets for transactions of a multithreaded computing environment
Facilitating processing in a computing environment. A request to access a cache of the computing environment is obtained from a transaction executing on a...
US-1,004,2764 Processing commands in a directory-based computer memory management system
A method for processing commands in a directory-based computer memory management system includes receiving a command to perform an operation on data stored in a...
US-1,004,2763 Write back coordination node for cache latency correction
A coordinating node acts as a write back cache, isolating local cache storage endpoints from latencies associated with accessing geographically remote cloud...
US-1,004,2762 Light-weight cache coherence for data processors with limited data sharing
A data processing system includes a plurality of processors, local memories associated with a corresponding processor, and at least one inter-processor link. In...
US-1,004,2761 Read and write sets for transactions of a multithreaded computing environment
Facilitating processing in a computing environment. A request to access a cache of the computing environment is obtained from a transaction executing on a...
US-1,004,2760 Scalable cloud storage architecture
A virtual storage module operable to run in a virtual machine monitor may include a wait-queue operable to store incoming block-level data requests from one or...
US-1,004,2759 Dual space storage management system and data read/write method
A computer system includes an addressing assembly, connected respectively to high bits of a memory address line of a processor and high bits of a word address...
US-1,004,2758 High availability storage appliance
A high-availability storage system includes a first storage system and a second storage system. The first storage system includes a first Central Processing...
US-1,004,2757 Memory system capable of controlling wireless communication function
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, controller, memory, wireless communication function section,...
US-1,004,2756 Methods for scheduling read commands and apparatuses using the same
A method for scheduling read commands, performed by a processing unit, contains the following steps: Logical read commands are received from a master device via...
US-1,004,2755 3D vertical NAND memory device including multiple select lines and control lines having different vertical spacing
Some embodiments include apparatuses, and methods of forming and operating the apparatuses. Some of the apparatuses include a pillar including a length, a...
US-1,004,2754 User device including a nonvolatile memory device and a data write method thereof
An access method of a nonvolatile memory device included in a user device includes receiving a write request to write data into the nonvolatile memory device;...
US-1,004,2753 Data storage device for storing data storage information of data and method for operating the same
A data storage device includes a memory including a plurality of memory blocks each of which includes a plurality of pages suitable for storing data transmitted...
US-1,004,2752 Object descriptors
In one example in accordance with the present disclosure, a method may include identifying, by a first operating system process in a computer system accessing a...
US-1,004,2751 Method and system for multi-tier all-flash array
Example embodiments of the present invention relate to a method, a system, and a computer program product for tiering metadata. The method includes selecting a...
US-1,004,2750 Apparatuses and methods for adaptive control of memory using an adaptive memory controller with a memory...
Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a processing unit configured to run an operating system,...
US-1,004,2749 Prefetch insensitive transactional memory
Prevention of a prefetch memory operation from causing a transaction to abort. A local processor receives a prefetch request from a remote processor. A...
US-1,004,2748 Automated discovery of gaming preferences
Systems and methods for automated discovery of gaming preferences and delivery of gaming choices based gaming preferences are disclosed. The systems and methods...
US-1,004,2747 System and method for determining requirements for testing software
A computer-implemented method, computer program product, and system is provided for determining requirements for testing software. In an implementation, a...
US-1,004,2746 Callpath finder
Techniques and systems for creating a function call graph for a codebase are disclosed. Graph creation includes identifying functions in the codebase by a...
US-1,004,2745 Enhancing the debugger stack with recently reported errors under debug
Method and apparatus for enhancing an executable is disclosed herein. In one embodiment, the method includes instrumenting an executable with additional program...
US-1,004,2744 Adopting an existing automation script to a new framework
Arrangements described herein relate to adopting an existing automation script to a new framework. A first version of an automation script configured to execute...
US-1,004,2743 Computer system testing
Computer-implemented methods and apparatuses for application testing are provided. Such apparatuses may include a data repository that stores a copy of at least...
US-1,004,2742 Selective object testing in a client-server environment
Embodiments of the present invention disclose a method, computer program product, and system for testing objects in a client-server environment. A server...
US-1,004,2741 Determining a subset of tests
Methods and apparatuses are described for determining a small subset of tests that provides substantially the same coverage as the set of tests. During...
US-1,004,2740 Techniques to identify idiomatic code in a code base
Techniques to identify idiomatic code in a code base are described. Embodiments of such techniques are configured with idiom information corresponding to...
US-1,004,2739 Real-time analytics of machine generated instrumentation data
An aspect includes generating instrumentation data for software that is executing on a computer and writing the instrumentation data to a memory located on the...
US-1,004,2738 Lightweight trace based measurement systems and methods
An automotive electronics system includes an electronic control unit and a trace adapter. The electronic control unit is configured to receive measurement...
US-1,004,2737 Program tracing for time travel debugging and analysis
Recording a replay-able trace of execution of a multi-threaded process includes identifying a trace memory model that defines one or more orderable events that...
US-1,004,2736 Breakpoint for predicted tuple processing time in a streaming environment
A stream of tuples is received to be processed by processing elements operating on one or more computer processors with each processing element having one or...
US-1,004,2735 Selecting application wrapper logic components for wrapping a mobile application based on wrapper performance...
For each of a plurality of wrapper logic components, a metric is determined from content of reports received from user electronic devices that characterizes...
US-1,004,2734 Context tracing for software logging
Context tracing may be implemented by modifying a call to parameterize, and thereby govern, logging operations of a called software application or program....
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