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Patent # Description
US-1,004,9978 Semiconductor module
A semiconductor module includes a wiring substrate and two semiconductor devices mounted on the wiring substrate. The semiconductor module includes a housing...
US-1,004,9977 Semiconductor package on package structure and method of forming the same
A package on package structure may be formed by fabricating or providing a bottom package having a substrate, at least one die on top of the substrate, and...
US-1,004,9976 Semiconductor substrate and manufacturing method thereof
A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit...
US-1,004,9975 Substrate structure
A substrate structure is provided, including a substrate body having a conductive pad, an insulation layer formed on the substrate body and exposing the...
US-1,004,9974 Metal silicate spacers for fully aligned vias
A multi-level semiconductor device and a method of fabricating a multi-level semiconductor device involve a first interlayer dielectric (ILD) layer with one or...
US-1,004,9973 Electronic package and fabrication method thereof and substrate structure
A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the...
US-1,004,9972 Wiring board, electronic component device, method for manufacturing wiring board, and method for manufacturing...
A wiring board includes a first wiring layer, an insulating layer, and a pad. The insulating layer is formed on the first wiring layer. The pad is formed on the...
US-1,004,9971 Package structure to enhance yield of TMI interconnections
An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound...
US-1,004,9970 Methods of manufacturing printed circuit board and semiconductor package
A method of manufacturing a semiconductor package according to the present inventive concepts comprises preparing a printed circuit board (PCB) including a...
US-1,004,9969 Integrated circuit
An integrated circuit includes a lead frame having a die attach paddle with a slot extending through the die attach paddle from a first surface to a second...
US-1,004,9968 Semiconductor device
To improve the reliability of a semiconductor device. A chip mounting portion TAB5 is arranged to be shifted to the +x direction side. Further, a gate electrode...
US-1,004,9967 Method of producing an optoelectronic component and optoelectronic component
A method of producing an optoelectronic component includes providing a lead frame having an upper side including a contact region and a chip reception region...
US-1,004,9966 Semiconductor device and corresponding method
A semiconductor device includes a leadframe that includes contact pins and a semiconductor die that has protruding connection formations. A flexible support...
US-1,004,9965 Through-substrate vias and methods for forming the same
A device includes a semiconductor substrate and a Metal-Oxide-Semiconductor (MOS) transistor. The MOS transistor includes a gate electrode over the...
US-1,004,9964 Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
A semiconductor device has a semiconductor package and an interposer disposed over the semiconductor package. The semiconductor package has a first...
US-1,004,9963 Power electronics module
A power electronics module is provided having one or more power converter semiconductor components. The power electronics module further has a substrate having...
US-1,004,9962 Arrangement of multiple power semiconductor chips and method of manufacturing the same
A semiconductor power arrangement includes a chip carrier having a first surface and a second surface opposite the first surface. The semiconductor power...
US-1,004,9961 Partially molded direct chip attach package structures for connectivity module solutions
Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures included herein may include a die on a...
US-1,004,9960 Semiconductor device
According to the present invention, a grease layer having a grease as a constituent material is provided in a filling region lying between a heat dissipation...
US-1,004,9959 Thermal interface pad material with perforated liner
This invention relates to a thermal interface device (206) arranged to provide a thermal coupling interface between a heat-generating unit (202) and a...
US-1,004,9958 Semiconductor device
A semiconductor device includes a semiconductor module and a cooler. The semiconductor device includes semiconductor element(s) within a molded resin and a heat...
US-1,004,9957 On-chip control of thermal cycling
A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative...
US-1,004,9956 Passivation structure and method of making the same
A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric...
US-1,004,9955 Fabrication method of wafer level packaging semiconductor package with sandwich structure of support plate...
A fabrication method of a semiconductor package includes the steps of: forming a release layer on a carrier having concave portions; disposing chips on the...
US-1,004,9954 Semiconductor package having routable encapsulated conductive substrate and method
A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame...
US-1,004,9953 Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate...
A method includes forming a through-via from a first conductive pad of a first device die. The first conductive pad is at a top surface of the first device die....
US-1,004,9952 Method of fabricating a semiconductor module with a inclined groove formed in resin side surface
A manufacturing method of a semiconductor module includes: sealing an assembly with resin, the assembly including a semiconductor chip, a heat-dissipation plate...
US-1,004,9951 Bonded substrate, method for manufacturing the same, and support substrate for bonding
A method for manufacturing a bonded substrate is provided, the bonded substrate including a single-crystal semiconductor substrate on a sintered-body substrate...
US-1,004,9950 Multi-layer substrate for semiconductor packaging
The present invention provides a semiconductor substrate (105, 105a) comprising two or more layers of built-up structural layers (120, 220) formed on a...
US-1,004,9949 In-situ packaging decapsulation feature for electrical fault localization
An IR camera is used to image an IC to identify hot spots. The objective of the IR camera is removed and laser optics are inserted into the optical axis of the...
US-1,004,9948 Power switching system for ESC with array of thermal control elements
A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control...
US-1,004,9947 Method of manufacturing a substrate
A method of manufacturing a substrate is disclosed. The method comprises: providing a first semiconductor substrate, which includes an at least partially...
US-1,004,9946 Vertical CMOS structure and method
A method for forming stacked, complementary transistors is disclosed. Selective deposition techniques are used to form a column having a lower portion that...
US-1,004,9945 Forming a CMOS with dual strained channels
The present invention relates generally to a semiconductor device, and more particularly, to a structure and method of forming a compressive strained layer and...
US-1,004,9944 Method of manufacturing selective nanostructures into finFET process flow
A method for integrating nanostructures in finFET processing and a related device are provided. Embodiments include forming fins in a Si substrate in first and...
US-1,004,9943 Methods of manufacturing a semiconductor device
A method of manufacturing a semiconductor device includes forming a first gate structure on a substrate, the first gate structure including a gate insulation...
US-1,004,9942 Asymmetric semiconductor device and method of forming same
An aspect of the disclosure provides for an asymmetric semiconductor device. The asymmetric semiconductor device may comprise: a substrate; and a fin-shaped...
US-1,004,9941 Semiconductor isolation structure with air gaps in deep trenches
A device includes a semiconductor substrate, a contact plug over the semiconductor substrate, and an Inter-Layer Dielectric (ILD) layer over the semiconductor...
US-1,004,9940 Structure and method for metal gates with roughened barrier layer
A method of forming a semiconductor device includes receiving a structure having a substrate, a gate trench over the substrate, and a dielectric layer over the...
US-1,004,9939 Semiconductor device and a method for fabricating the same
In a method of manufacturing a semiconductor device, an isolation region is formed in a substrate, such that the isolation region surrounds an active region of...
US-1,004,9938 Semiconductor devices, FinFET devices, and manufacturing methods thereof
Semiconductor devices, fin field effect transistor (FinFET) devices, and methods of manufacturing semiconductor devices are disclosed. In some embodiments, a...
US-1,004,9936 Semiconductor device having merged epitaxial features with Arc-like bottom surface and method of making the same
A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate, two semiconductor fins over the substrate,...
US-1,004,9935 Integrated circuit package having pin up interconnect
An integrated circuit package and manufacturing method thereof are described. The integrated circuit package includes pin up conductive plating to form an...
US-1,004,9934 Wafer processing method
A wafer processing method divides a wafer into individual device chips along division lines. The method includes attaching an adhesive tape to the front side of...
US-1,004,9933 Element chip manufacturing method
An element chip manufacturing method includes a preparation process of preparing a substrate which includes a first surface provided with a bump and a second...
US-1,004,9932 Method of manufacturing of a sidewall opening of an interconnect of a semiconductor device
A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An...
US-1,004,9931 Method of manufacturing a semiconductor device including through silicon plugs
A method of making a semiconductor device is provided including forming a first opening and a second opening in a first surface of a substrate. A conductive...
US-1,004,9930 Memory device and operation method thereof
A semiconductor device and a method for fabricating the semiconductor device are provided. In the method for fabricating the semiconductor device, at first, a...
US-1,004,9929 Method of making semiconductor structure having contact plug
The present invention provides a method of forming a semiconductor structure including a substrate, a transistor, a first ILD layer, a second ILD layer, a first...
US-1,004,9928 Embedded 3D interposer structure
A device includes an interposer, which includes a substrate; and at least one dielectric layer over the substrate. A plurality of through-substrate vias (TSVs)...
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