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Patent # Description
US-1,004,9007 Non-volatile memory device and read method thereof
A non-volatile memory device including a non-volatile memory and a controller is provided. The controller establishes a standard table and at least one priority...
US-1,004,9006 Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during...
A method for updating a DRAM memory array is disclosed. The method comprises: a) transitioning the DRAM memory array from an idle state to a refresh state in...
US-1,004,9005 Flash memory control apparatus utilizing buffer to temporarily storing valid data stored in storage plane, and...
A flash memory control apparatus includes a data read/write interface and a controller. The data read/write interface is arranged for coupling a first flash...
US-1,004,9004 Electronic system with memory data protection mechanism and method of operation thereof
An electronic system includes: a host processor; a system memory, coupled to the host processor, includes data persistence regions identified by the host...
US-1,004,9003 CRC counter normalization
The ability to accurately and efficiently calculate and report communication errors is becoming more important than ever in today's communications environment....
US-1,004,9002 Display interface bandwidth modulation
Bandwidth modulation may enable most of the display data-path to operate at a lower performance level to reduce power consumption by using compression as part...
US-1,004,9001 Dynamic error correction configuration
Server computers often include one or more input/output (I/O) devices for communicating with a network or direct attached storage device. Data written to or...
US-1,004,9000 Method and apparatus for partial packet recovery during WLAN scanning
Methods and apparatuses are provided for recovering data transmitted to a terminal. A processor of the terminal selects a plurality of candidate frames expected...
US-1,004,8999 Method and apparatus for optimizing recovery of single-disk failure
The present invention discloses a method for optimizing recovery of a single-disk failure, including the following steps: obtaining, according to current load...
US-1,004,8998 Transmission apparatus and failure detection method
There is provided a transmission apparatus including: a memory in which history data of a rewrite process on which an in-device header referred in a device is...
US-1,004,8997 Single event latch up mitigation in solid state power controllers
A system for mitigating a solid state power controller (SSPC) open fault caused by single event latchup (SEL) on a power module includes a microprocessor in a...
US-1,004,8996 Predicting infrastructure failures in a data center for hosted service mitigation actions
A data center may predict infrastructure failures in order to perform mitigation actions at services hosted at the data center. Operational metrics for...
US-1,004,8995 Methods and apparatus for improved fault analysis
A method includes receiving a signal indicative of a value of a data point associated with a compute device at a first time. The value of the data point...
US-1,004,8994 Identifying failed customer experience in distributed computer systems
Systems and methods for identifying failed customer experience in distributed computer systems. An example method may comprise: receiving, by a processing...
US-1,004,8993 Input management system and method
The present invention is directed to a method, medium and system for use in a computing environment for managing input information. The system for facilitating...
US-1,004,8992 Extension of schematized XML protocols
An application using one version of a schematized XML protocol communicates with another application using a different version of the schematized XML protocol....
US-1,004,8991 System and method for parallel processing data blocks containing sequential label ranges of series data
A series data distributed processing system including a parallel processing system and a distributed series data management unit managing distributed series...
US-1,004,8990 Parallel access of partially locked content of input file
A high availability environment of resource adapters implements processes to manage and to distribute work among the adapters or adapter instances. An input...
US-1,004,8989 Automated workload analysis and simulation process
This disclosure sets forth systems and methods for recommending candidate computing platforms for migration of data and data-related workload from an original...
US-1,004,8988 Method and electronic device for processing intent
A method of operating an electronic device includes segmenting a second message in a first message, allocating the segmented second message to at least two...
US-1,004,8987 Methods and apparatus for a resource sharing platform having resource quality estimation
Methods and apparatus for providing resource quality estimation in a resource sharing platform having a master and resources on slaves. Embodiments include...
US-1,004,8986 Method and device for allocating browser processes according to a selected browser process mode
The present invention relates to a method and device for allocating a browser process. The method comprises: first, obtaining data related to a current system...
US-1,004,8985 Estimating time remaining for an operation
Techniques for estimating time remaining for an operation are described. Examples operations include file operations, such as file move operations, file copy...
US-1,004,8984 Event-driven multi-tenant computer-management platform
Computer implemented techniques comprise instructions configured to cause a processor to obtain routines, receive a user defined set of obtained routines to...
US-1,004,8983 Systems and methods for enlisting single phase commit resources in a two phase commit transaction
Systems and methods are provided for enlisting single phase commit resources in a two phase commit transaction. An exemplary method includes accessing a global...
US-1,004,8982 Method for performing control transfers in a system with cloaked pages
A virtual-machine-based system that identifies an application or process in a virtual machine in order to locate resources associated with the identified...
US-1,004,8981 Performing virtual machine live migration within a threshold time by adding available network path in multipath...
An estimated time to migrate a VM from a source hypervisor to a target hypervisor is calculated. The estimated time is compared to a threshold time and based on...
US-1,004,8980 Scalable policy assignment in an edge virtual bridging (EVB) environment
One embodiment includes obtaining virtual machine (VM) information for at least one VM. The VM information includes a VSI type identification (ID) associated...
US-1,004,8979 Managing virtual machine migration
Systems and method for the management of migrations of virtual machine instances are provided. A migration manager monitors the resource usage of a virtual...
US-1,004,8978 Apparatus and method for identifying a virtual machine having changeable settings
At a first time of detecting, from among a plurality of virtual machines as management targets, a first virtual machine that has not stored therein...
US-1,004,8977 Methods and apparatus for multi-stage VM virtual network function and virtual service function chain...
Methods and Apparatus for Multi-Stage VM Virtual Network Function and Virtual Service Function Chain Acceleration for NFV and needs-based hardware acceleration....
US-1,004,8976 Allocation of virtual machines to physical machines through dominant resource assisted heuristics
Technologies are generally described to allocation of virtual machines to physical machines through dominant resource assisted heuristics. According to some...
US-1,004,8975 Scalable policy management in an edge virtual bridging (EVB) environment
A method includes validating, by a switch, a message including virtual machine (VM) information using a value of a virtual station interface (VSI) type...
US-1,004,8974 Message-based computation request scheduling
A system for routing requests to execute user code based on how frequently the user code is executed is provided. The system may be configured to receive a...
US-1,004,8973 Sequential activity intelligent personal assistant
A non-transitory storage maintains a project script including a sequence of steps, each step including a description of the step and a sound signature...
US-1,004,8972 Method for model-based generation of startup configurations of embedded systems
A method for model-based generation of startup configurations of embedded systems that includes importing into a modeling module a first startup configuration...
US-1,004,8971 Determining characteristics of configuration files
Determining a characteristic of a configuration file that is used to discover configuration files in a target machine, a computer identifies, using information...
US-1,004,8970 Portable boot configuration solution for thin client device
Certain aspects direct to systems and methods for performing boot configuration of a thin client device with a portable storage device, such as a universal...
US-1,004,8969 Dynamic branch predictor indexing a plurality of weight tables by instruction address fetch history and making...
A processor includes: an instruction execution unit that executes an instruction; and a branch prediction unit that stores history information indicating every...
US-1,004,8967 Processor arranged to operate as a single-threaded (nX)-bit processor and as an n-threaded X-bit processor in...
Methods of running a 32-bit operating system on a 64-bit processor are described. In an embodiment, the processor comprises 64-bit hardware and when running a...
US-1,004,8966 Instruction set for supporting wide scalar pattern matches
A processor includes an instruction decoder to receive an instruction having a first operand, a second operand, and a third operand, and an execution unit...
US-1,004,8965 Instruction and logic for a binary translation mechanism for control-flow security
A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the...
US-1,004,8964 Disambiguation-free out of order load store queue
In a processor, a disambiguation-free out of order load store queue method. The method includes implementing a memory resource that can be accessed by a...
US-1,004,8963 Executing system call vectored instructions in a multi-slice processor
Executing system call vectored (SCV) instructions in a multi-slice processor including receiving, by an instruction fetch unit, a SCV instruction, wherein the...
US-1,004,8962 Apparatus, system, and method for non-volatile data storage and retrieval
A computer memory device and a method of storing data are provided. The computer memory device includes a parallel memory interface configured to be operatively...
US-1,004,8961 Distributed parallel build system
This document describes, among other things, systems and methods for managing distributed parallel builds. A computer-implemented method to manage parallel...
US-1,004,8960 Identifying source code used to build executable files
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying source code used to build executable. One of the...
US-1,004,8959 Method and apparatus for incremental upgrade
Disclosed is a method and an apparatus for incremental upgrade. When a server generates an incremental file, it acquires sub-files of different types in an old...
US-1,004,8958 Live data as a service and corresponding programming infrastructure
Techniques for live data management are described. Some embodiments provide a Live Data Management System ("LDMS") that provides a facility for managing live...
US-1,004,8957 Deploying an application in a cloud computing environment
A technique for deploying an application in a cloud computing environment includes: collecting, when a user is deploying an application, metadata and...
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