Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,005,6501 Power diode with improved reverse-recovery immunity
Provided is a device with improved reverse-recovery immunity of a diode element. The device includes: a first conductivity-type drift layer; a second...
US-1,005,6500 Vertical JFET made using a reduced mask set
A vertical JFET made by a process using a limited number of masks. A first mask is used to form mesas and trenches in active cell and termination regions...
US-1,005,6499 Bidirectional JFET and a process of forming the same
An electronic device comprising a bidirectional JFET can include a drain/source region; a lightly doped semiconductor layer overlying the drain/source region; a...
US-1,005,6498 Semiconductor device and manufacturing method thereof
A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material....
US-1,005,6497 Semiconductor device and manufacturing method thereof
A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first...
US-1,005,6496 Display device and method of manufacturing display device
A method of manufacturing a display device is provided. The display device includes a display region divided into a first display region and a second display...
US-1,005,6495 Thin film transistor and display device using the same
The purpose of the invention is to eliminate an abnormal current at an edge of a semiconductor layer in a thin film transistor. The invention is: A thin film...
US-1,005,6494 Semiconductor device and manufacturing method thereof
A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer,...
US-1,005,6493 Semiconductor device
A semiconductor device is provided in the present invention, which includes a substrate, an oxide-semiconductor layer, source/drain regions, a first dielectric...
US-1,005,6492 Semiconductor device, display device including the semiconductor device, display module including the display...
A semiconductor device including a transistor is provided. The transistor includes a gate electrode, a first insulating film over the gate electrode, a second...
US-1,005,6491 Semiconductor devices including gate dielectric structures
A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper...
US-1,005,6490 Semiconductor device and method for fabricating the same
A semiconductor device includes: a fin-shaped structure on a substrate, in which a sidewall of the fin-shaped structure comprises a curve. Specifically, the...
US-1,005,6489 Replacement metal gate structures
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method...
US-1,005,6488 Interlayer dielectric for non-planar transistors
The present description relates the formation of a first level interlayer dielectric material layer within a non-planar transistor, which may be formed by a...
US-1,005,6487 Strained semiconductor nanowire
At least one semiconductor nanowire laterally abutted by a pair of semiconductor pad portions is formed over an insulator layer. Portions of the insulator layer...
US-1,005,6486 Methods for fin thinning providing improved SCE and S/D EPI growth
Methods to reduce a width of a channel region of Si fins and the resulting devices are disclosed. Embodiments include forming a Si fin in a Si layer; forming a...
US-1,005,6485 Semiconductor devices with gate-controlled energy filtering
The present disclosure relates to semiconductor devices with gate-controlled energy filtering. One example embodiment includes a semiconductor device. The...
US-1,005,6484 VTFET devices utilizing low temperature selective epitaxy
Low temperature epitaxial silicon deposition for forming the top source or drain regions of VTFET structures. The methods generally include epitaxially growing...
US-1,005,6483 Method for producing a semiconductor device including semiconductor pillar and fin
A method for producing a semiconductor device includes forming a fin-shaped semiconductor layer on a substrate, forming a first insulating film around the...
US-1,005,6482 Implementation of long-channel thick-oxide devices in vertical transistor flow
A method for fabricating a semiconductor structure is provided that includes the steps of: forming a structure including a substrate, a counter-doped layer on...
US-1,005,6481 Semiconductor device structure
The present disclosure provides a semiconductor device structure including an active region having a semiconductor-on-insulator (SOI) configuration, a...
US-1,005,6480 High-side power device and manufacturing method thereof
A high-side device includes: a substrate, an epitaxial layer, a high voltage well, a body region, a gate, a source, a drain, and a buried region. A channel...
US-1,005,6479 Semiconductor device
A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a...
US-1,005,6478 High-electron-mobility transistor and manufacturing method thereof
Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is...
US-1,005,6477 Nitride heterojunction bipolar transistor with polarization-assisted alloy hole-doped short-period superlattice...
A nitride heterojunction bipolar transistor with one or more polarization-assisted alloy hole-doped short-period superlattice layers are described herein. The...
US-1,005,6476 Heterojunction bipolar transistor
A collector layer of an HBT includes a high-concentration collector layer and a low-concentration collector layer thereon. The low-concentration collector layer...
US-1,005,6475 Semiconductor device and method for manufacturing the same
A first source electrode is formed in contact with a semiconductor layer; a first drain electrode is formed in contact with the semiconductor layer; a second...
US-1,005,6474 Semiconductor structures having increased channel strain using fin release in gate regions
A method of introducing strain in a channel region of a FinFET device includes forming a fin structure on a substrate, the fin structure having a lower portion...
US-1,005,6473 Semiconductor device and manufacturing method thereof
A method for manufacturing a semiconductor device, including forming a dummy gate structure on a substrate, in which the substrate has a source/drain portion...
US-1,005,6472 Method for forming semiconductor structure with contact over source/drain structure
A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a...
US-1,005,6471 Semiconductor device
A semiconductor device includes a fin-shaped semiconductor layer and a pillar-shaped semiconductor layer on the fin-shaped semiconductor layer. A metal gate...
US-1,005,6470 Consumption of the channel of a transistor by sacrificial oxidation
A method for manufacturing a transistor is provided, the transistor including a gate disposed above an underlying layer of a semiconductor material, the gate...
US-1,005,6469 Gate cut integration and related device
A method for forming gate cuts during RMG processing and the resulting device are provided. Embodiments include forming Si fins over a substrate; forming a STI...
US-1,005,6468 Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked fins
A method of reducing parasitic capacitance includes providing a starting semiconductor structure, the starting semiconductor structure including a semiconductor...
US-1,005,6467 Semiconductor fin structure and method of forming the same
A method of forming a semiconductor fin structure is provided. A substrate is provided, which has at least two sub regions and a dummy region disposed...
US-1,005,6466 Methods for fabricating semiconductor device
A method for fabricating a semiconductor device may comprise forming a first transistor having a first threshold voltage in a first region of a substrate,...
US-1,005,6465 Transistor device and fabrication method
Transistor devices and fabrication methods are provided. A transistor is formed by forming a dummy gate film on a substrate and doping an upper portion of the...
US-1,005,6464 III-V gate-all-around field effect transistor using aspect ratio trapping
Embodiments of the invention provide methods for forming III-V gate-all-around field effect transistors on silicon substrates that utilize Aspect-Ratio Trapping...
US-1,005,6463 Transistor and manufacturing method thereof
A transistor includes a semiconductor channel layer, a gate structure, a gate insulation layer, an internal electrode, and a ferroelectric material layer. The...
US-1,005,6462 Metal gate structure and manufacturing method thereof
The present disclosure provides a semiconductor structure includes a semiconductor layer having a surface, and an interlayer dielectric (ILD) defining a metal...
US-1,005,6461 Composite masking self-aligned trench MOSFET
Aspects of the present disclosure discloses a method for fabricating a trench MOSFET device comprising simultaneously forming a narrow trench and a wide trench...
US-1,005,6460 Semiconductor device and manufacturing method thereof
A semiconductor device includes: a semiconductor layer; a first insulating film which covers a surface of the semiconductor layer; a first adhering film which...
US-1,005,6459 Semiconductor arrangement
A semiconductor arrangement comprising a substrate having a first trench formed therein, a field plate layer arranged to extend within the first trench and coat...
US-1,005,6458 Siloxane and organic-based MOL contact patterning
Methods of MOL S/D contact patterning of RMG devices without gouging of the Rx area or replacement of the dielectric are provided. Embodiments include forming a...
US-1,005,6457 Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) device cells using channel region...
The subject matter disclosed herein relates to semiconductor power devices, such as silicon carbide (SiC) power devices. In particular, the subject matter...
US-1,005,6456 N-channel gallium nitride transistors
The present description relates to n-channel gallium nitride transistors which include a recessed gate electrode, wherein the polarization layer between the...
US-1,005,6455 Semiconductor device and method of fabricating the same
A semiconductor device including a substrate, a gate stack, a pair of insulator structures, and source/drain materials is provided. The substrate has a...
US-1,005,6454 Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate. A first fin extends in a first direction. A first nano sheet structure includes at least two first...
US-1,005,6453 Semiconductor wafers with reduced bow and warpage
The present disclosure relates to semiconductor structures and, more particularly, to semiconductor wafers with reduced bowing and warping and methods of...
US-1,005,6452 Method for manufacturing vertical super junction drift layer of power semiconductor devices
A method for manufacturing a vertical super junction drift layer of a power semiconductor device. The method includes: a): adopting a P+ single crystal silicon...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.