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Patent # Description
US-1,005,6434 Organic light emitting display panel and method of manufacturing the same
An exemplary embodiment discloses an organic light emitting display panel including a base substrate comprising first pixels configured to emit a light having a...
US-1,005,6433 Semiconductor memory and method of manufacturing the same
A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers...
US-1,005,6432 Self-rectifying RRAM cell structure having two resistive switching layers with different bandgaps and RRAM 3D...
The present disclosure provides a self-rectifying RRAM cell structure including a first electrode layer formed of a nitride of a first metal element, a second...
US-1,005,6431 Variable resistance memory device
A variable resistance memory device may include a word line extending in a first direction, a bit line extending in a second direction crossing the first...
US-1,005,6430 MRAM with voltage dependent in-plane magnetic anisotropy
Apparatuses, systems, and methods are disclosed for magnetoresistive random access memory. A magnetic tunnel junction for storing data may include a fixed...
US-1,005,6429 Electrode structure of optoelectronic device
An optoelectronic device includes a first optoelectronic unit; a second optoelectronic unit; a third optoelectronic unit formed between the first optoelectronic...
US-1,005,6428 Semiconductor device and method of forming curved image sensor region robust against buckling
A semiconductor wafer has a plurality of non-rectangular semiconductor die with an image sensor region. The non-rectangular semiconductor die has a circular,...
US-1,005,6427 Front side illuminated image sensor device structure and method for forming the same
An FSI image sensor device structure is provided. The FSI image sensor device structure includes a substrate and a barrier structure formed in the substrate....
US-1,005,6426 Apparatus and method for fabricating a light guiding grid
A light guide grid can include a grid structure having a plurality of intersecting grid lines, each grid line having a width w, and a plurality of openings for...
US-1,005,6425 Methods of making semiconductor X-ray detector
Disclosed herein is a method of making an apparatus suitable for detecting x-ray, the method comprising: attaching a chip comprising an X-ray absorption layer...
US-1,005,6424 Semiconductor device, electrical device system, and method of producing semiconductor device
A semiconductor device includes an SOI substrate formed of a first semiconductor layer having a first conductive type, an embedded oxide film, and a circuit...
US-1,005,6423 Multispectral imaging device
A multispectral imaging device, comprising a pixel array, each said pixel comprises at least a first subpixel and a second subpixel, each subpixel comprises at...
US-1,005,6422 Stacked semiconductor chip RGBZ sensor
An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The...
US-1,005,6421 Imaging device and imaging method
An imaging device, comprising: a pixel group in which unit pixels including a plurality of pixels receiving light fluxes having passed through different pupil...
US-1,005,6420 Semiconductor device and manufacturing method thereof
Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor...
US-1,005,6419 Chip package having chip connected to sensing device with redistribution layer in insulator layer
A chip package is provided. The chip package includes a sensing device. The chip package also includes a first conductive structure disposed on the sensing...
US-1,005,6418 Imaging element for generating a pixel signal corresponding to light receiving elements
An imaging element includes: a first substrate; first light receiving elements regularly disposed on the first substrate; first color filters each of which is...
US-1,005,6417 Image-sensor structures
An image-sensor structure is provided. The image-sensor structure includes a substrate with a plurality of photoelectric conversion units formed therein, a...
US-1,005,6415 Germanium-silicon light sensing apparatus
A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for...
US-1,005,6414 Thin film transistor array substrate having black matrix formed in non-display zone and common electrode formed...
A thin film transistor array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes a substrate and a...
US-1,005,6413 Semiconductor device
A semiconductor device that is less influenced by variations in characteristics between transistors or variations in a load, and is efficient even for...
US-1,005,6411 Array substrate, preparation and driving method thereof, liquid crystal display panel and display device
The present invention discloses an array substrate, preparation and driving methods thereof, a liquid crystal display panel and a display device, for reducing...
US-1,005,6410 Method for manufacturing array substrate, and array substrate, display panel and display device
A method for manufacturing an array substrate, and an array substrate, a display panel and a display device are provided. The method may include: forming, on...
US-1,005,6408 Structure and method to form a FinFET device
A method for fabricating a FinFET device includes forming a silicon-on-insulator (SOI) substrate having a semiconductor layer overlaying a buried oxide (BOX)...
US-1,005,6407 Semiconductor device and a method for fabricating the same
A semiconductor device includes a first gate structure disposed on a substrate. The first gate structure includes a first gate electrode, a first cap insulating...
US-1,005,6406 Semiconductor integrated circuit device comprising MISFETs in SOI and bulk subtrate regions
The semiconductor integrated circuit device has a hybrid substrate structure which includes both of an SOI structure and a bulk structure on the side of the...
US-1,005,6405 Semiconductor device and manufacturing method thereof
In the case where a signal delay is found in a circuit operation in a semiconductor chip, when a repeater for delay reduction is additionally formed as a result...
US-1,005,6404 Semiconductor memory devices having closely spaced bit lines
The inventive concepts relate to a semiconductor memory device. The semiconductor memory device includes a substrate including a circuit region and first and...
US-1,005,6403 Semiconductor memory
A semiconductor memory includes a memory cell region that includes multiple memory cells stacked above a semiconductor substrate, first and second dummy regions...
US-1,005,6402 Semiconductor device
Improvements are achieved in the characteristics of a nonvolatile memory. In plan view, in a first isolation region which is an element isolation region...
US-1,005,6400 Stacked semiconductor device
According to one embodiment, a semiconductor device includes a semiconductor substrate, a stacked body, and a first insulating film. The stacked body is...
US-1,005,6399 Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same
A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers, a first memory opening...
US-1,005,6398 Method of forming split-gate, twin-bit non-volatile memory cell
A memory device that includes a substrate of semiconductor material of a first conductivity type, first and second regions spaced apart in the substrate and...
US-1,005,6397 Integrated circuit and method for manufacturing thereof
A method for manufacturing an integrated circuit includes following steps. A substrate including a memory region and a core region is provided. At least two...
US-1,005,6396 Method of manufacturing semiconductor device and semiconductor device
A semiconductor device having good characteristics without variation and a method of manufacturing the same are provided. A part of a conductive layer for a...
US-1,005,6395 Method of improving localized wafer shape changes
A method of manufacturing an integrated circuit including forming trenches into the surface of a crystalline wafer and the trenches extending along a...
US-1,005,6394 Ferroelectric tunnel junction and method of fabrication thereof
A method for fabricating a ferroelectric tunnel junction, comprising growing a hafnium zirconium oxide film barrier layer by sputtering in the presence of...
US-1,005,6393 Application of antiferroelectric like materials in non-volatile memory devices
Integrated devices comprising pinched hysteresis loop (PHL) materials in a capacitor or a transistor stack are disclosed. PHL materials include field induced...
US-1,005,6392 Performing horological functions in commercial transactions using time cells
Mechanisms for controlling a commercial transaction is presented. An article of manufacture has a time cell that is read by an electronic apparatus. In response...
US-1,005,6391 Vertically stacked FinFET fuse
A semiconductor structure including a stacked FinFET fuse is provided in which the stacked FinFET fuse includes a plurality of vertically stacked and spaced...
US-1,005,6390 FinFET SRAM having discontinuous PMOS fin lines
An IC chip includes a logic circuit cells array and a static random access memory (SRAM) cells array. The logic circuit cells array includes a plurality of...
US-1,005,6389 Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication
A memory cell based upon thyristors for an SRAM integrated circuit can be implemented in different combinations of MOS and bipolar select transistors, or...
US-1,005,6388 Method for fabricating semiconductor device
A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region defined thereon; forming a trench in the...
US-1,005,6387 Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The...
US-1,005,6386 Memory cells and memory arrays
Some embodiments include a memory cell having a first transistor supported by a semiconductor base, and having second and third transistors above the first...
US-1,005,6385 Semiconductor device including write access transistor whose oxide semiconductor layer including channel...
Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory...
US-1,005,6384 Multi-die fine grain integrated voltage regulation
A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more...
US-1,005,6383 Enhanced channel strain to reduce contact resistance in NMOS FET devices
A semiconductor device includes a substrate, a fin structure and an isolation layer formed on the substrate and adjacent to the fin structure. The semiconductor...
US-1,005,6382 Modulating transistor performance
A method of forming an improved field-effect transistor device is provided. The method includes forming a tensile stressor near a first semiconductor fin. The...
US-1,005,6381 Punchthrough stop layers for fin-type field-effect transistors
Device structures for a FinFET and fabrication methods for making a device structure for a FinFET. A first layer containing a first dopant is formed on a first...
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