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Patent # Description
US-1,005,5392 History-based archive management
Apparatus, systems, and methods may operate to determine a proximate save time difference between a target version of electronic content and a next (proximate...
US-1,005,5391 Method and apparatus for forming a structured document from unstructured information
Illustrative embodiments improve upon prior machine learning techniques by introducing an additional classification layer that mimics human visual pattern...
US-1,005,5390 Simulated hyperlinks on a mobile device based on user intent and a centered selection of text
Systems and methods simulate a hyperlink in regular content displayed on a screen. An example method can include generating, responsive to detecting a simulated...
US-1,005,5389 Ordering documents within a crawled website
Systems and methods of the present invention provide for one or more server computers communicatively coupled to a network and configured to: access a source...
US-1,005,5388 Declarative style rules for default touch behaviors
In at least some embodiments, a mechanism is provided for web developers to request specific default behaviors, such as touch behaviors, on their webpages. In...
US-1,005,5387 Multi-level customizable pagination
A device may receive a trigger to generate a pagination for a set of data entries. The device may determine a quantity of pagination levels associated with the...
US-1,005,5386 Using server side font preparation to achieve WYSIWYG and cross platform fidelity on web based word processor
A system and method is illustrated for platform-independent rendering of a document in a web browser supporting a two-dimensional (2D) canvas. The system and...
US-1,005,5385 Visual preview based on analytical metadata
Provided are a system and method for generating a preview of master data based on metadata thereof. In one example, a method includes receiving a data file...
US-1,005,5384 Advanced zero-knowledge document processing and synchronization
Techniques disclosed herein decouple a document's structure from its general content wherein the structure is retained in plaintext (both at a client device and...
US-1,005,5383 Matrix circuits
A circuit is provided. In an example, the circuit includes a memory array that includes a plurality of memory cells to store a matrix and a plurality of data...
US-1,005,5382 System and method for managing vehicle by using mobile terminal
A system and method for managing a vehicle by using a mobile terminal. The mobile terminal includes: a vehicle verification unit that receives information for...
US-1,005,5381 Controller and method for migrating RDMA memory mappings of a virtual machine
An RDMA-capable network interface controller provides an RDMA access to a physical memory using multiple mapping tables; the physical memory includes a...
US-1,005,5380 Dynamic clock lane assignment for increased performance and security
A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently...
US-1,005,5379 Peripheral component interconnect express card
A peripheral component interconnect express (PCIe) card may include a base card, a mezzanine card and mezz connectors. The base card may be coupled to a host...
US-1,005,5378 Coupling connector to management port or system port
A device is connected to a connector of a computing system. In response, the computing system determines whether the device is a management device. In response...
US-1,005,5377 Using a proprietary framework on a standards-based embedded device
A vendor extension command is used to transport a proprietary message to a device (e.g., a solid state drive), to instruct the device to access and return data...
US-1,005,5376 Serial peripheral interface system with slave expander
A serial peripheral interface system with a slave expander method and apparatus can include: receiving a data stream from a master device, the data stream...
US-1,005,5375 Single-chip control module for an integrated system-on-a-chip for silicon photonics
The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data...
US-1,005,5374 Participating station for a bus system and method for data transmission in a bus system
A participating station for a bus system and a method for data transmission in a bus system are provided. The participating station comprises a transceiver unit...
US-1,005,5373 Reproduction device and reproduction system
A reproduction device includes a reproduction unit, communication paths, and a communication-path control unit. The reproduction unit is configured to be able...
US-1,005,5372 Orthogonal differential vector signaling codes with embedded clock
Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct data and clocking signals over...
US-1,005,5371 Apparatus and method for RDMA with commit ACKs
Embodiments of apparatuses and methods for remote direct memory access (RDMA) with commit acknowledgements (ACKs) are described. In embodiments, a device may...
US-1,005,5370 Method and apparatis for processor standby
A method of and device for removing a processor from a low power mode. The method includes and the device provides for performing multiple processor start-up...
US-1,005,5369 Systems and methods for coalescing interrupts
Systems, apparatuses, and methods for coalescing interrupts temporally for later processing are described. An interrupt controller in a computing system...
US-1,005,5368 Mobile device and method for synchronizing use of the mobile device's communications port among a plurality of...
A mobile device and method for synchronizing use of the mobile device's communications port among a plurality of applications are provided. In one embodiment, a...
US-1,005,5367 Integrated-circuit radio
An integrated-circuit radio communication device (1) comprises a processor (7) having a hardware-interrupt input line; memory (13); radio communication logic...
US-1,005,5366 Method for data transmission and server for implementing the method
A method for data transmission within a server that includes a processor, a main memory, a southbridge, a chipset, and a buffer, the chipset including a...
US-1,005,5365 Shared buffer arbitration for packet-based switching
Methods and apparatuses regarding shared buffer arbitration for packet-based switching are described. A data packet may be received by a packet buffer including...
US-1,005,5364 Methods and systems for filtering communication between peripheral devices and mobile computing devices
The embodiments are directed to methods and systems for sending and receiving signals between one or more peripheral devices connected to a dongle system and an...
US-1,005,5363 Method for configuring an interface unit of a computer system
A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set...
US-1,005,5362 Apparatus and method for providing application auto-install function in digital device
An apparatus and method install an application in a digital device. An apparatus for providing a connection program to a desired peripheral device in a digital...
US-1,005,5361 Memory controller for providing a plurality of defined areas of a mass storage medium as independent mass...
A computer system includes at least one processor, a first mass memory and a second mass memory. The computer system implements a master operating system core,...
US-1,005,5360 Apparatus and method for shared least recently used (LRU) policy between multiple cache levels
A method and apparatus are described for a shared LRU policy between cache levels. For example, one embodiment of the invention comprises: a level N cache to...
US-1,005,5359 Pinning objects in multi-level memory hierarchies
The described embodiments include a computer system having a multi-level memory hierarchy with two or more levels of memory, each level being one of two or more...
US-1,005,5358 Run length encoding aware direct memory access filtering engine for scratchpad enabled multicore processors
Techniques are described herein for efficient movement of data from a source memory to a destination memory. In an embodiment, in response to a particular...
US-1,005,5357 Systems and methods for secure multi-access of system firmware during pre-boot
Systems and methods are provided that may be implemented to systems and methods that may be implemented to utilize direct memory access (DMA) remapping to...
US-1,005,5356 Memory device and method for controlling memory device
Provided is a memory device with improved memory region usage efficiency. The memory device includes flash memory including: a control information (FAT) region...
US-1,005,5355 Non-disruptive clearing of varying address ranges from cache
In an approach for purging an address range from a cache, a processor quiesces a computing system. Cache logic issues a command to purge a section of a cache to...
US-1,005,5354 Systems, devices and methods using a solid state device as a caching medium with a hashing algorithm to...
A method for managing a caching medium for a storage system includes providing an SSD cache including a plurality of cache lines, providing a data structure...
US-1,005,5353 Apparatus, method and system that stores bios in non-volatile random access memory
A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is ...
US-1,005,5352 Page cache write logging at block-based storage
A block-based storage system may implement page cache write logging. Write requests for a data volume maintained at a storage node may be received at a storage...
US-1,005,5351 Low-overhead index for a flash cache
Systems and methods for a low-overhead index for a cache. The index is used to access content or segments in the cache by storing at least an identifier and a...
US-1,005,5350 Controlled cache injection of incoming data
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for pre-fetching data. The methods, systems, and apparatus...
US-1,005,5349 Cache coherence protocol
The present disclosure relates to systems, methods, and computer program products for keeping multiple caches updated, or coherent, on multiple servers when the...
US-1,005,5348 Transactional execution in a multi-processor environment that monitors memory conflicts in a shared cache
A higher level shared cache of a hierarchical cache of a multi-processor system utilizes transaction identifiers to manage memory conflicts in corresponding...
US-1,005,5347 Vacuum blender
A vacuum blender having a vessel, a motor base containing a motor having a motor drive shaft, a blade holder having a blade with a blade shaft for engaging the...
US-1,005,5346 Polarity based data transfer function for volatile memory
Apparatus, systems, and methods to implement polarity based data transfer function for volatile memory power reduction are described. The transfer function take...
US-1,005,5345 Methods, devices and systems for solid state drive control
A solid state drive controller includes a processor configured to couple to a plurality of non-volatile memory devices. The plurality of non-volatile memory...
US-1,005,5344 Intelligent computer memory management
A plurality of memory allocators are initialized within a computing system. At least a first memory allocator and a second memory allocator in the plurality of...
US-1,005,5343 Memory storage windows in a memory system
A memory device comprises a first plurality of addressable memory locations associated with a first data storage window and a second plurality of addressable...
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