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Patent # Description
US-1,006,1604 Program execution recording and playback
A computer system receives a first instruction identifier identifying a first instruction being executed by a first thread associated with a first virtual...
US-1,006,1603 Method and apparatus for dynamic routing of user contexts
In one example, a method and apparatus for dynamic routing of user contexts are disclosed. In one example, a method for supporting a context associated with a...
US-1,006,1602 System and method for providing a virtual assembly builder for use with a cloud computing environment
A system and method for providing a virtual assembly builder for use with a cloud computing environment. In accordance with an embodiment, the system can...
US-1,006,1601 Component navigation in an extensible application
In one embodiment, a method receives configuration information for a set of components of an extensible application. A component in the set of components...
US-1,006,1600 Ascertaining configuration of a virtual adapter in a computing environment
A control component of a computing environment activates a virtual adapter hosted on a physical adapter of a host system of the computing environment. The...
US-1,006,1599 Bus enumeration acceleration
Firmware determines during a boot of a computer, if a bus enumeration is needed or if the computer can be booted quicker by skipping a bus enumeration. The...
US-1,006,1598 Generation of usage tips
One or more processors monitor usage of an application on a first computing device. The one or more processors determine whether the usage of a feature of the...
US-1,006,1597 Computing device with first and second operating systems
In one example in accordance with the present disclosure, a computing device utilizes a basic input/output system (BIOS) to program a chipset to generate an...
US-1,006,1596 Systems and methods for loading firmware modules
In accordance with embodiments of the present disclosure, a method may include during boot of the information handling system, in response to one of a system...
US-1,006,1595 Fast computer startup
Fast computer startup is provided by, upon receipt of a shutdown command, recording state information representing a target state. In this target state, the...
US-1,006,1594 Protecting and verifying contents of files on mobile computing devices
A method is provided for operating a computing device, the method including verifying the contents of a protected portion of a nonvolatile memory included in...
US-1,006,1593 Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions
An apparatus of an aspect includes a plurality of cores and shared core extension logic coupled with each of the plurality of cores. The shared core extension...
US-1,006,1592 Architecture and execution for efficient mixed precision computations in single instruction multiple...
A method for improving power, performance, area (PPA) for mixed precision computations in a processing environment. The method includes determining a braiding...
US-1,006,1591 Redundancy elimination in single instruction multiple data/thread (SIMD/T) execution processing
A method for reducing execution of redundant threads in a processing environment. The method includes detecting threads that include redundant work among many...
US-1,006,1590 Generating and executing a control flow
The present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device...
US-1,006,1589 Systems, apparatuses, and methods for data speculation execution
Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for DSX comprises decoder...
US-1,006,1588 Tracking operand liveness information in a computer system and performing function based on the liveness...
Operand liveness state information is maintained during context switches for current architected operands of executing programs. The current operand state...
US-1,006,1587 Instruction and logic for bulk register reclamation
A processor includes a front end, a decoder, an allocator, and a retirement unit. The decoder includes logic to identify an end-of-live-range (EOLR) indicator....
US-1,006,1586 Latent modification instruction for transactional execution
An instruction stream includes a transactional code region. The transactional code region includes a latent modification instruction (LMI), a next sequential...
US-1,006,1585 Instruction for performing a pseudorandom number generate operation
A machine instruction is provided that includes an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation, and a...
US-1,006,1584 Store nullification in the target field
Apparatus and methods are disclosed for nullifying memory store instructions identified in a target field of a nullification instruction. In some examples of...
US-1,006,1583 Systems, apparatuses, and methods for data speculation execution
Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for performing DSX comprises a...
US-1,006,1582 Method for increasing the speed of speculative execution
A method for increasing the speed of execution by a processor including the steps of selecting a sequence of instructions to optimize, optimizing the sequence...
US-1,006,1581 On-the-fly conversion during load/store operations in a vector processor
Systems and methods for performing on-the-fly format conversion on data vectors during load/store operations are described herein. In one embodiment, a method...
US-1,006,1580 Implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or...
A computer program product for implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or cracked sequence is...
US-1,006,1579 Distributed double-precision floating-point addition
The present embodiments relate to circuitry that efficiently performs double-precision floating-point addition operations, single-precision floating-point...
US-1,006,1578 System and method of configuring a data store for tracking and auditing real-time events across different...
Described herein are methods and systems for configuring a data store for tracking and auditing real time events associated with an end-to-end development...
US-1,006,1577 System and method for optimizing job scheduling within program builds
A method for executing program builds comprising: analyzing file dependency information and job duration information associated with jobs of the program build;...
US-1,006,1576 Vehicle-mounted program writing device
A vehicle-mounted program writing device includes a plurality of vehicle-mounted control devices and a relay device. If a write start command button is turned...
US-1,006,1575 Managed execution environment for software application interfacing
Some embodiments are directed to controlling interactions between a host software program and a computer system by providing a managed execution environment...
US-1,006,1574 Method and apparatus for multiple vehicle software module reflash
A system includes a processor configured to wirelessly receive update requests from a plurality of vehicles. The processor is also configured to, for each...
US-1,006,1573 User interfaces of application porting software platform
User interfaces of a software platform that generates transformed code from source code enable interaction with the codes. In various embodiments, the software...
US-1,006,1572 Reconfiguration of address space based on loading short pointer mode application
A short pointer mode application has been loaded. Based on determining that the short pointer mode application has been loaded, an address space configured for...
US-1,006,1571 System and method for link time optimization
A method for link time optimization comprises parsing, by a compiler, an intermediate representation file to determine what symbols are present in the...
US-1,006,1570 Per tenant initialization check removal
In an approach for removing tenant initialization check per tenant for compiled code, a processor receives a request to create a tenant. A processor creates the...
US-1,006,1569 Method and apparatus for solving a mixed integer programming problem
A method, apparatus and computer program product for solving a mixed integer programming problem. The apparatus includes a generating section configured to...
US-1,006,1568 Dynamic alias checking with transactional memory
An approach to dynamic run-time alias checking comprising creating a main thread and a helper thread, computing an optimized first region of code in a...
US-1,006,1567 Multi-sized data types for managed code
Embodiments are directed towards generating applications that include multi-sized types running in managed code. During the compilation of an intermediate...
US-1,006,1566 Methods and systems to identify log write instructions of a source code as sources of event messages
Methods and systems to identify log write instructions of a source code as potential sources of an event message of interest are described. Methods identify...
US-1,006,1565 Application development using mutliple primary user interfaces
Generally discussed herein are techniques, software, apparatuses, and systems configured for application development for an application using multiple primary...
US-1,006,1564 Injecting CPU time jitter to improve entropy quality for random number generator
Aspects of present disclosure relate to random number generator, a method and a computer program product of improving entropy quality of the random number...
US-1,006,1563 Hardware non-deterministic random byte generator
A random byte generator comprising a noise source configured to generate a noise signal, a digitizer with a resolution of no less than two bits and configured...
US-1,006,1562 Random number generator in a parallel processing database
A random number generation process generated uncorrelated random numbers from identical random number sequences on parallel processing database segments of an...
US-1,006,1561 Floating point addition with early shifting
A floating point adder includes leading zero anticipation circuitry to determine a number of leading zeros within a result significand value of a sum of a first...
US-1,006,1560 Executing perform floating point operation instructions
A method and system are disclosed for executing a machine instruction in a central processing unit. The method comprises the steps of obtaining a perform...
US-1,006,1559 Apparatus and method for controlling operation
Methods and apparatuses for performing arithmetic operations efficiently and quickly are described. Such arithmetic operations include, but are not limited to,...
US-1,006,1558 Data processing device, data processing method, and computer program
A device for temporarily storing data output from a register or data obtained by processing the output data, a processing method therefor, a program, and the...
US-1,006,1557 Method of controlling audio speaker settings in a vehicle based on dynamic determination of the occupancy state...
A method of controlling audio speaker settings in a vehicle with a rear row of seating comprises: requesting an operator of the vehicle to make a choice between...
US-1,006,1556 Audio settings
Techniques are provided for a playback device to play a media item using an audio setting corresponding to the media item and characteristics of the playback...
US-1,006,1555 Method and system of controlling media devices configured to output signals to surrounding area
A system of controlling media devices configured for outputting signals to a surrounding area. The system including a control strategy for controlling operation...
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